• 제목/요약/키워드: Zero-Crossing Compensation

검색결과 11건 처리시간 0.023초

A Novel Zero-Crossing Compensation Scheme for Fixed Off-Time Controlled High Power Factor AC-DC LED Drivers

  • Chang, Changyuan;Sun, Hailong;Zhu, Wenwen;Chen, Yao;Wang, Chenhao
    • Journal of Power Electronics
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    • 제16권5호
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    • pp.1661-1668
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    • 2016
  • A fixed off-time controlled high power factor ac-dc LED driver is proposed in this paper, which employs a novel zero-crossing-compensation (ZCC) circuit based on a fixed off-time controlled scheme. Due to the parasitic parameters of the system, the practical waveforms have a dead region. By detecting the zero-crossing boundary, the proposed ZCC circuit compensates the control signal VCOMP within the dead region, and is invalid above this region. With further optimization of the parameters KR and Kτ of the ZCC circuit, the dead zone can be eliminated and lower THD is achieved. Finally, the chip is implemented in HHNEC 0.5μm 5V/40V HVCMOS process, and a prototype circuit, delivering 7~12W of power to several 3-W LED loads, is tested under AC input voltage ranging from 85V to 265V. The test results indicate that the average total harmonic distortion (THD) of the entire system is approximately 10%, with a minimum of 5.5%, and that the power factor is above 0.955, with a maximum of 0.999.

공침법을 이용한 PbTiO3-Polymer O-3 압전 Composites (Performance Improvement on Cycloconverter-fed Induction Motor Speed Control System)

  • Cho, Ok-Kyun;Shin, Hwi-Beom;Yuon, Myung-Joong
    • 대한전기학회논문지
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    • 제36권5호
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    • pp.352-359
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    • 1987
  • The cycloconverter operating on a circulating current-free mode has many zero crossing points. If an exact zero crossing points are not detected, the three phase-unbalanced currents will flow in a motor. In this paper, the current feedback using a current reference wave is proposed to improve the problems of zero crossing detection, three phase-unbalanced voltages, currents, and torgue ripples. To prevent the saturation of the air gap flux and keep the torque constant, the constant voltage / hertz control with IR compensation is adopted. The PI-controller is designed using the linearized model of the cycloconverterinduction motor system. Alsi, Z-80A single board computer has been used to implement the proposed scheme which results in the performance improvement of cycloconterter-fed induction motor speed control system.

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단상 PV 인버터용 온라인 데드타임 보상기 연구 (A New On-Line Dead-Time Compensator for Single-Phase PV Inverter)

  • 부우충기엔;이상회;차한주
    • 전력전자학회논문지
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    • 제17권5호
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    • pp.409-415
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    • 2012
  • This paper presents a new software-based on-line dead-time compensation technique for a single-phase grid-connected photovoltaic (PV) inverter system. To prevent a short circuit in the inverter arms, a switching delay time must be inserted in the pulse width modulation (PWM) signals. This causes the dead-time effect, which degrades the system performance around zero-crossing point of the output current. To reduce the dead-time effect around the zero-crossing point of grid current, a harmonic mitigation of grid current is used as an additional part of the synchronous frame current control scheme. This additional task mitigates the harmonic components caused by the dead-time from the grid current. Simulation and experimental results are shown to verify the effectiveness of the proposed dead-time compensation method in the single-phase grid-connected inverter system.

Flyback AC-DC Converter with Low THD Based on Primary-Side Control

  • Chang, Changyuan;He, Luyang;Cao, Zixuan;Zhao, Dadi
    • Journal of Power Electronics
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    • 제18권6호
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    • pp.1642-1649
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    • 2018
  • A single-stage flyback LED AC-DC converter based on primary-side control under constant current mode is proposed in this study. The proposed converter features low total harmonic distortion (THD) and high power factor (PF). It also consists of a zero-crossing distortion compensation circuit and a variable duty ratio control compensation circuit to deal with the line current distortions caused by fixed duty ratio control. The system model and layout are built in Simplis and Cadence, respectively. The feasibility and performance of the proposed circuit is verified by designing and fabricating an IC controller in the HHNEC $0.35{\mu}m$ 5 V/40 V HVCMOS process. Experimental results show that the PF can reach a level in the range of 0.985-0.9965. Moreover, the average THD of the entire system is approximately 10%, with the minimum being 6.305%, as the input line voltage changes from 85 VAC to 265 VAC.

이산화 오차를 고려한 ZCP 추정방법과 고속 BLDC 센서리스 구동에 관한 연구 (A Study of the ZCP Estimation Methods considering Discretization Error and High Speed BLDC Sensorless Drive)

  • 서은정;손정원;선우명호;이우택
    • 한국자동차공학회논문집
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    • 제22권1호
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    • pp.95-102
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    • 2014
  • This paper presents zero crossing point(ZCP) estimation methods considering discretization error for a high speed brushless DC(BLDC) motor drive. The ZCP is estimated by detecting the change of back-EMF polarity for the BLDC sensorless drive, and the discretization error exist on the estimated ZCP. The discretization error of the ZCP is a cause of the delay of a commutation timing of current and increment of a current ripple factor. Besides a delay of a ZCP estimation brings on the limitation of a speed range for the BLDC sensorless drive. The compensation method based on the error analysis with probability theory for reducing the effects of the discretization error of the ZCP is proposed. Also a ZCP estimation method according to the Back-EMF patterns is proposed to widen the speed range for the BLDC sensorless drive. The proposed methods are verified by the experiment.

단상 PV 인버터용 온-라인 데드타임 보상기 연구 (A New On-Line Dead-Time Compensator for Single-Phase PV Inverter)

  • 부우충기엔;차한주
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2010년도 하계학술대회 논문집
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    • pp.216-217
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    • 2010
  • This paper presents a new software-based on-line dead-time compensation technique for single-phase grid-connected photovoltaic (PV) inverter system. To improve the mitigation of dead-time effect around the zero-crossing point of phase current, a selective harmonic elimination of instantaneous feedback current is used as an additional part of conventional current control scheme. Simulation and experimental results are shown to verify the effectiveness of proposed compensation method in the grid-connected power distributed generation systems.

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Accuracy Enhancement of Parameter Estimation and Sensorless Algorithms Based on Current Shaping

  • Kim, Jin-Woong;Ha, Jung-Ik
    • Journal of Power Electronics
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    • 제16권1호
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    • pp.1-8
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    • 2016
  • Dead time is typically incorporated in voltage source inverter systems to prevent short circuit cases. However, dead time causes an error between the output voltage and reference voltage. Hence, voltage equation-based algorithms, such as motor parameter estimation and back electromotive force (EMF)-based sensorless algorithms, are prone to estimation errors. Several dead-time compensation methods have been developed to reduce output voltage errors. However, voltage errors are still common in zero current crossing areas, and an effect of the error is much worse in a low speed region. Therefore, employing voltage equation-based algorithms in low speed regions is difficult. This study analyzes the conventional dead-time compensation method and output voltage errors in low speed operation areas. A current shaping method that can reduce output voltage errors is also proposed. Experimental results prove that the proposed method reduces voltage errors and improves the accuracy of the parameter estimation method and the performance of the back EMF-based sensorless algorithm.

고속 DVD 시스템에서 비대칭 신호 보정기와 결합한 Digital PLL 설계 (Design of Digital PLL with Asymmetry Compensator in High Speed DVD Systems)

  • 김판수;고석준;최형진;이정현
    • 한국통신학회논문지
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    • 제26권12A호
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    • pp.2000-2011
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    • 2001
  • 본 논문에서는 기존 1배속 및 6배속과 같은 저속 DVD 시스템에서 설계되었던 Analog PLL(Phase Locked Loop)을 고배속 동작에 유용하게 디지털화 했으며, 고속인 20배속 DVD 시스템에서의 최적 Digital PLL 모델을 제시하였다. 특히, 고속 DVD 시스템 설계에서 성능 열화의 주요 원인인 bulk delay, 샘플링 클럭 주파수 오타, 비대칭 신호 현상과 같은 채널 영향들을 고려하여 안정적으로 동작할 수 있는 DPLL 설계에 초점을 맞추었다. 우선, DPLL에서는 새로운 타이밍 에러 검출 알고리즘으로 변형된 Early-Late 방법을 제시하였다. 그리고, 비대칭 신호 보정기에는 고속으로 동작하고 안정적으로 보정 역할을 수행하는 영점교차 지점을 이용한 4샘플 신호 보정 알고리즘을 설계하였다. 본 논문에서 제안하는 타이밍 에러 검출기는 기존 방식에 비해 각각, 3dB의 SNR 이득과 지터성능이 4배 향상됨을 볼 수 있었고 또한, 영점교차 지점에서 4샘플 신호를 이용한 보정 알고리즘은 기존 방식에 비해 보상시간의 50% 단축과 2dB의 SNR 이득, 지터 성능의 34% 효율을 볼 수 있었다. 최종적으로 제안된 비대칭 보정기와 DPLL이 통합된 시스템을 BER 성능 평가를 통해서 기존 알고리즘에 비해 제안된 방식이 0.4dB, 2dB 성능 향상을 확인하였다.

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CNC 공작 기계의 마찰력 보상을 위한 상호 결합 제어 (Cross-Coupled Control for the Friction Compensation of CNC Machines)

  • 주정홍;이현철;이연정;전기준
    • 제어로봇시스템학회논문지
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    • 제5권4호
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    • pp.462-470
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    • 1999
  • In this paper, we proposed a cross-couple controller for compensating nonlinear friction of the X-Y table of CNC machines. Due to the nonlinearity of the frictions, large contour errors, referred to as quadrant glitches, occur when each axis of the X-Y table makes a zero velocity crossing. To reduce the quadrant glitches the friction compensators and nonlinear friction observers for estimating Coulomb frictions are employed in the proposed method. A hyperbolic tangent function is used in reducing the magnitude of quadrant glitches and the CEM (Contour Error Model) is utilized for the estimation of the velocities. The performance of the proposed compensators is evaluated for several trajectories by computer simulations.

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직접 반송파 변조 시스템을 위한 IQ 변조기 설계 (A Design of IQ Modulator for Direct Carrier Modulation Systems)

  • 문태수;;정용채
    • 한국전자파학회논문지
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    • 제22권9호
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    • pp.847-851
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    • 2011
  • 본 논문에서는 입력 신호의 진폭과 위상을 미세 조정할 수 있는 새로운 IQ 변조기를 제안하였다. 제안된 IQ 변조기는 저위상 편차 감쇠기, 분배기, 그리고 결합기로 구성되어 있다. 기존 감쇠기의 위상 편차 특성을 극복하기 위한 새로운 위상 보상 기술을 사용하였고, 이를 수식적으로 분석하였다. 제안하는 IQ 변조기를 통하여 완전한 $360^{\circ}$의 위상 조정과 동시에 입력 신호의 큰 진폭 조정이 가능하며, 극좌표계의 중심점을 지나는 선형적인 IQ신호 배열을 구현하였다.