• 제목/요약/키워드: Zero current switching

검색결과 603건 처리시간 0.025초

새로운 액티브 스너버를 이용한 소프트 스위칭 PWM 컨버터 (Soft Switching PWM Converter Using a New Active Snubber)

  • 조만철;김주용;문상필;서기영;권순걸
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2006년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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    • pp.261-263
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    • 2006
  • A new soft switched active snubber circuit is proposed to achieve zero voltage and zero current switching for all the switching devices in PWM DC-DC converters. The unique location of the snubber and inductor ensures low current/voltage stresses and commutation losses. With a saturable reactor, the conduction loss of auxiliary switch could be further minimized. A boost converter adopting this technique is presented as an example, to illuminate its operation principles and derive the design procedures. Simulation and hardware implementation have been made to validate its performance. Some other basic PWM DC-DC topologies using the proposed snubber have also been given.

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PWM 컨버터를 위한 향상된 ZVZCS Commutation Cell (An improved Commutation Cell for PWM Converter)

  • 유승희
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2000년도 전력전자학술대회 논문집
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    • pp.388-391
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    • 2000
  • In this paper a modified ZVZCS(zero-voltage/zero-current switching) commutation cell with minimum additional components which provides soft switching at both turn-on and turn-off of main and auxiliary switches as well as diodes in PWM converters is presented. The proposed soft-switching technique is suitable for not only minority but also majority carrier semiconductor devices. The auxiliary switch of the proposed ZVZCS commutation cell is in parallel with the main switch and therefore there is no current stress on the main switch and diode. The operation principles of the proposed ZVZCS commutation cell are theoretically analyzed using the PWM boost converter topology as an example. Theoretical analysis simulation and experimental results verify the validity of the PWM boost converter topology with the proposed ZVZCS commutatioin cell.

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Asymmetrical Pulse-Width-Modulated Full-Bridge Secondary Dual Resonance DC-DC Converter

  • Chen, Zhangyong;Zhou, Qun;Xu, Jianping;Zhou, Xiang
    • Journal of Power Electronics
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    • 제14권6호
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    • pp.1224-1232
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    • 2014
  • A full-bridge secondary dual-resonant DC-DC converter using the asymmetrical pulse-width modulated (APWM) strategy is proposed in this paper. The proposed converter achieves zero-voltage switching for the power switches and zero-current switching for the rectifier diodes in the whole load range without the help of any auxiliary circuit. Given the use of the APWM strategy, a circulating current that exists in a traditional phase-shift full-bridge converter is eliminated. The voltage stress of secondary rectifier diodes in the proposed converter is also clamped to the output voltage. Thus, the existing voltage oscillation of diodes in traditional PSFB converters is eliminated. This paper presents the circuit configuration of the proposed converter and analyzes its operating principle. Experimental results of a 1 kW 385 V/48 V prototype are presented to verify the analysis results of the proposed converter.

개선된 폴딩 스너버 망을 이용하여 소프트하게 역 복귀하는 의사 공진형 펄스 폭 컨버터 (The Soft Recovery Pulse Width Modulation Quasi Resonant Converter with Revised Folding Snubber Network)

  • 정진국
    • 전자공학회논문지SC
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    • 제47권1호
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    • pp.62-66
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    • 2010
  • 순수한 수동소자들을 사용하여 영전류 영전압에서 소프트하게 스위칭 동작하는 펄스 폭 변조 의사 공진 컨버터를 소개한다. 사용된 수동 소자망은 폴딩 스너버망의 변형된 형태로 컨버터의 주 정류 다이오드의 역 복귀 전류를 제거시켜 주고 스위칭 소자 MOSFET를 소프트하게 스위칭 시킨다. 효율도 능동 스너버형과 비슷한 수준이고 회로 구성이 간단하여 구현하기 쉬우며 중 출력(수 KW이하) 정전압 공급원에 적합하다.

영전압 스위칭 프로그래머블 전원장치에 관한 연구 (A Zero-Voltage-Switching Programmable Power Supply)

  • 오덕진;임상언;김희준
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
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    • 제49권8호
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    • pp.551-556
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    • 2000
  • A zero-voltage-switching(ZVS) programmable power supply employing the ZVS active clamp forward converter is suggested. Through the analysis on operation region of the supply, the constant power region and the maximum current limit region are clearly identified. Furthermore, the duty ratio range corresponding to the variation range of the output voltages and the control scheme at the minimum duty ration region are presented. Finally, in order to vefity the validity of the operation for the proposed power supply, experimental evaluation results obtained on an 1kW prototype power supply for the 198~242VAC input voltage range(220VAC$\pm$10%), the 0~25V output voltage range, and the 100kHz switching frequency are presented.

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Current Limit Strategy of Voltage Controller of Delta-Connected H-Bridge STATCOM under Unbalanced Voltage Drop

  • Son, Gum Tae;Park, Jung-Wook
    • Journal of Electrical Engineering and Technology
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    • 제13권2호
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    • pp.550-558
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    • 2018
  • This paper presents the current limit strategy of voltage controller of delta-connected H-bridge static synchronous compensator (STATCOM) under an unbalanced voltage fault event. When phase to ground fault happens, the feasibility to heighten the magnitude of sagging phase voltage is considered by using symmetric transformation method in delta-structure STATCOM. And the efficiency to cover the maximum physical current limit of switching device is considered by using vector analysis method that calculate the zero sequence current for balancing the cluster energy in delta connected H-bridge STATCOM. The result is simple and obvious. Only positive sequence current has to be used to support the unbalanced voltage sag. Although the relationship between combination of the negative sequence voltage with current and zero sequence current is nonlinear, the more negative sequence current is supplying, the larger zero sequence current is required. From the full-model STATCOM system simulation, zero sequence current demand is identified according to a ratio of positive and negative sequence compensating current. When only positive sequence current support voltage sag, the least zero sequence current is needed.

전동차 출입문 구동을 위한 SRM용 C-dump 컨버터 Topology 특성 비교 (Characteristic Analysis of C-dump Converter Topology for SRM of Electric Multiple Unit Door Driving)

  • 윤용호
    • 전기학회논문지
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    • 제65권9호
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    • pp.1597-1604
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    • 2016
  • The speed at which the SRM (Switched Reluctance Motor) makes a transition from chopping control to single pulse operation. (i.e., low speed to high speed operation). It is unsatisfied with performance at all operational regimes. In this paper, the operational performance of SRM can be improved by using current hysteresis control method. This method maintains a generally flat current waveform. At the high speed, the current chopping capability is lost due to the development of the back-EMF. Therefore SRM operates in single pulse mode. By using zero-current switching and zero-voltage switching technique, the stress of power switches can be reduce in chopping mode. When the commutation from one phase winding to another phase winding, the current can be zero as fast as possible in this period because several times negative voltage of DC-source voltage produce in phase winding. This paper is compared to performance based on energy efficient C-dump converter topology and the proposed resonant C-dump converter topology. Simulation and experimental results are presented to verify the effectiveness of the proposed circuit.

공진형 C-dump컨버터에 의한 SRM의 고성능 운전 (High performance operation of SRM by Resonant C-dump Converter)

  • 정균하;윤용호;김세주;원충연;김영렬
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2004년도 전력전자학술대회 논문집(1)
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    • pp.28-32
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    • 2004
  • In this paper, the operational performance of SRM can be improved by using current hysteresis control method. This method maintains a generally flat current waveform. At the high speed, the current chopping capability is lost due to the development of the back-EMF. Therefore SRM operates in single pulse mode. By using zero-current switching and zero-voltage switching technique, the stress of power switches can be reduce in chopping mode. When the commutation from one phase winding to another phase winding, the current can be zero as fast as possible in this period because several times negative voltage of DC-source voltage produce in phase winding. This paper is compared to performance based on conventional C-dump converter topology and the proposed resonant C-dump converter topology Simulation and experimental results are presented to verify the effectiveness of the proposed circuit.

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New Three-Level PWM DC/DC Converter - Analysis, Design and Experiments

  • Lin, Bor-Ren;Chen, Chih-Chieh
    • Journal of Power Electronics
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    • 제14권1호
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    • pp.30-39
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    • 2014
  • This paper studies a new three-level pulse-width modulation (PWM) resonant converter for high input voltage and high load current applications. In order to use high frequency power MOSFETs for high input voltage applications, a three-level DC converter with two clamped diodes and a flying capacitor is adopted in the proposed circuit. For high load current applications, the secondary sides of the proposed converter are connected in parallel to reduce the size of the magnetic core and copper windings and to decrease the current rating of the rectifier diodes. In order to share the load current and reduce the switch counts, three resonant converters with the same active switches are adopted in the proposed circuit. Two transformers with a series connection in the primary side and a parallel connection in the secondary side are adopted in each converter to balance the secondary side currents. To overcome the drawback of a wide range of switching frequencies in conventional series resonant converters, the duty cycle control is adopted in the proposed circuit to achieve zero current switching (ZCS) turn-off for the rectifier diodes and zero voltage switching (ZVS) turn-on for the active switches. Finally, experimental results are provided to verify the effectiveness of the proposed converter.

Interleaved ZVS DC/DC Converter with Balanced Input Capacitor Voltages for High-voltage Applications

  • Lin, Bor-Ren;Chiang, Huann-Keng;Wang, Shang-Lun
    • Journal of Power Electronics
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    • 제14권4호
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    • pp.661-670
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    • 2014
  • A new DC/DC converter with zero voltage switching is proposed for applications with high input voltage and high load current. The proposed converter has two circuit modules that share load current and power rating. Interleaved pulse-width modulation (PWM) is adopted to generate switch control signals. Thus, ripple currents are reduced at the input and output sides. For high-voltage applications, each circuit module includes two half-bridge legs that are connected in series to reduce switch voltage rating to $V_{in}/2$. These legs are controlled with the use of asymmetric PWM. To reduce the current rating of rectifier diodes and share load current for high-load-current applications, two center-tapped rectifiers are adopted in each circuit module. The primary windings of two transformers are connected in series at the high voltage side to balance output inductor currents. Two series capacitors are adopted at the AC terminals of the two half-bridge legs to balance the two input capacitor voltages. The resonant behavior of the inductance and capacitance at the transition interval enable MOSFETs to be switched on under zero voltage switching. The circuit configuration, system characteristics, and design are discussed in detail. Experiments based on a laboratory prototype are conducted to verify the effectiveness of the proposed converter.