• Title/Summary/Keyword: Y-capacitors

Search Result 1,425, Processing Time 0.038 seconds

Characterization of a Remote Inductively Coupled Plasma System (원격 유도결합 플라즈마 시스템의 특성 해석)

  • Kim, Yeong-Uk;Yang, Won-Kyun;Joo, Jung-Hoon
    • Journal of Surface Science and Engineering
    • /
    • v.41 no.4
    • /
    • pp.134-141
    • /
    • 2008
  • We have developed a numerical model for a remote ICP(inductively coupled plasma) system in 2D and 3D with gas distribution configurations and confirmed it by plasma diagnostics. The ICP source has a Cu tube antenna wound along a quartz tube driven by a variable frequency rf power source($1.9{\sim}3.2$ MHz) for fast tuning without resort to motor driven variable capacitors. We investigated what conditions should be met to make the plasma remotely localized within the quartz tube region without charged particles' diffusing down to a substrate which is 300 mm below the source, using the numerical model. OES(optical emission spectroscopy), Langmuir probe measurements, and thermocouple measurement were used to verify it. To maintain ion current density at the substrate less than 0.1 $mA/cm^2$, two requirements were found to be necessary; higher gas pressure than 100 mTorr and smaller rf power than 1 kW for Ar.

Hardware implementation of a pulse-type neuron chain with a synapse function for hodgkin-huxley model (호지킨-헉슬리 모델을 위한 시냅스 기능을 지닌 신경세포 체인의 하드웨어 구현)

  • Jung, Jin-Woo;Kwon, Bo-Min;Park, Ju-Hong;Kim, Jin-Su;Lee, Je-Won;Park, Yong-Su;Song, Han-Jung
    • Journal of Sensor Science and Technology
    • /
    • v.18 no.2
    • /
    • pp.128-134
    • /
    • 2009
  • Integrated circuit of a new neuron chain with a synapse function for Hodgkin-Huxley model which is a good electrical model about a real biological neuron is implemented in a $0.5{\mu}m$ 1 poly 2 metal CMOS technology. Pulse type neuron chain consist of series connected current controlled single neurons through synapses. For the realization of the single neuron, a pair of voltage mode oscillators using operational transconductance amplifiers and capacitors is used. The synapse block which is a connection element between neurons consist of a voltage-current conversion circuit using current mirror. SPICE simulation results of the proposed circuit show 160 mV amplitude pulse output and propagation of the signal through synapses. Measurements of the fabricated pulse type neuron chip in condition of ${\pm}2.5\;V$ power supply are shown and compared with the simulated results.

An Ultra-precision Electronic Clinometer for Measurement of Small Inclination Angles

  • Tan, Siew-Leng;Kataoka, Satoshi;Ishikawa, Tatsuya;Ito, So;Shimizu, Yuuki;Chen, Yuanliu;Gao, Wei;Nakagawa, Satoshi
    • Journal of the Korean Society of Manufacturing Technology Engineers
    • /
    • v.23 no.6
    • /
    • pp.539-546
    • /
    • 2014
  • This paper describes an ultra-precision electronic clinometer, which is based on the capacitive-based fluid type, for detection of small inclination angles. The main parts of the clinometer low-noise electronics are two capacitance measurement circuits for converting the capacitances of the capacitors of the clinometer into voltages, and a differential amplifier for obtaining the difference of the capacitances, which is proportional to the input inclination angle. A 16 bit analog to digital (AD) converter is also embedded into the same circuit board, whose output is sent to a PC via RS-232C, for achieving a small noise level down to tens of ${\mu}v$. A compensation method, which is referred to as the delay time method for shortening the stabilization time of the sensor was also discussed. Experimental results have shown the possibility of achieving a measurement resolution of $0.0001^{\circ}$ as well as the quick measurement with the delay time method.

Memory Characteristics of High Density Self-assembled FePt Nano-dots Floating Gate with High-k $Al_2O_3$ Blocking Oxide

  • Lee, Gae-Hun;Lee, Jung-Min;Yang, Hyung-Jun;Kim, Kyoung-Rok;Song, Yun-Heub
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2012.02a
    • /
    • pp.388-388
    • /
    • 2012
  • In this letter, We have investigated cell characteristics of the alloy FePt-NDs charge trapping memory capacitors with high-k $Al_2O_3$ dielectrics as a blocking oxide. The capacitance versus voltage (C-V) curves obtained from a representative MOS capacitor embedded with FePt-NDs synthesized by the post deposition annealing (PDA) treatment process exhibit the window of flat-band voltage shift, which indicates the presence of charge storages in the FePt-NDs. It is shown that NDs memory with high-k $Al_2O_3$ as a blocking oxide has performance in large memory window and low leakage current when the diameter of ND is below 2 nm. Moreover, high-k $Al_2O_3$ as a blocking oxide increases the electric field across the tunnel oxide, while reducing the electric field across the blocking layer. From this result, this device can achieve lower P/E voltage and lower leakage current. As a result, a FePt-NDs device with high-k $Al_2O_3$ as a blocking oxide obtained a~7V reduction in the programming voltages with 7.8 V memory.

  • PDF

Graphene synthesis by chemical vapor deposition on Cu foil

  • Kim, Sung-Jin;Yoo, Kwon-Jae;Seo, E.K.;Boo, Doo-Wan;Hwang, Chan-Yong
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2011.02a
    • /
    • pp.351-351
    • /
    • 2011
  • Graphene has drawn great interests because of its distinctive band structure and physical properties[1]. A few of the practical applications envisioned for graphene include semiconductor applications, optoelectronics (sola cell, touch screens, liquid crystal displays), and graphene based batteries/super-capacitors [2-3]. Recent work has shown that excellent electronic properties are exhibited by large-scale ultrathin graphite films, grown by chemical vapor deposition on a polycrystalline metal and transferred to a device-compatible surface[4]. In this paper, we focussed our scope for the understanding the graphene growth at different conditions, which enables to control the growth towards the application aimed. The graphene was grown using chemical vapor deposition (CVD) with methane and hydrogen gas in vacuum furnace system. The grown graphene was characterized using a scanning electron microscope(SEM) and Raman spectroscopy. We changed the growth temperature from 900 to $1050^{\circ}C$ with various gas flow rate and composition rate. The growth condition for larger domain will be discussed.

  • PDF

Reliability Analysis of MLCC Degradation Data based on Eyring Model (아이링 모델에 기초한 MLCC 열화데이터의 신뢰성 해석)

  • 김종철;김광섭;차종범
    • Proceedings of the Korean Reliability Society Conference
    • /
    • 2004.07a
    • /
    • pp.239-246
    • /
    • 2004
  • Accelerated degradation test (ADT) can be a useful tool for assessing the reliability when few or even no failure are expected in an accelerated life test. In this paper, MLCC (Multilayer Ceramic Capacitors), a sort of passive components which have large capacitance(X7R -55$^{\circ}C$~1$25^{\circ}C$) have been tested, and least-square analyses are used to illustrate our approach in which amount of degradation of a DUT following log-normal distribution. We assumed a simple and useful linear model to describe the amount of degradation over time subjected to different voltage levels applied. Tests for linearity of the performance-time relationship, and provide tests for how well the assumptions hold. Also, by using Eyring Model, MLCC's mean life time is assessed.

  • PDF

Design of 234.7 MHz Mixed Mode Frequency Multiplication & Distribution ASIC for ATM Switching System (ATM 교환기용 234.7 MHz 혼합형 주파수 체배분배 ASIC의 설계)

  • 채상훈;정희범
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.24 no.10A
    • /
    • pp.1597-1602
    • /
    • 1999
  • An analog / digital mixed mode frequency multiplication and distribution ASIC for switch link or network synchronization of ATM switching system for B-ISDN has designed. This ASIC generates 234-7 MHz system clock and 77.76 MHz, 19.44 MHz user clocks using 46.94 MHz external clock. It also includes digital circuits for checking and selecting between the two external clocks. For effective ASIC design, full custom technique is used in analog PLL circuit and standard cell based technique is used in digital circuit. Resistors and capacitors are specially designed so the chip can be implemented in 0.8$\mu\textrm{m}$ digital CMOS technology.

  • PDF

A study on transient stability of 345 KV power transmission line (345KV 송전선의 과도안정도계산 I)

  • 이재숙
    • 전기의세계
    • /
    • v.18 no.1
    • /
    • pp.24-29
    • /
    • 1969
  • This is preliminary study concerning the future construction and operation of 345KV power transmission line in Korea which will be added to the existing 161KV power system by the end of 1970 in order to increase the power carrying capacity between Seoul and Pusan area; 350 kilo meters aparts, in accordance with the ambitious second five years power development schedule of Korea Electric Company. The result of this study says that an intermidiate switching station should be installed at the middle position of the line to improve the transient stability of the system, considerable amount of capacitors or synchronous condenser are to be installed to reduce the voltage drop at receving end of line during the heavy load hours, and also in some measure to avoid the voltage rise by self-excitation of power generators during the light load hours and while energizing the line. This is the first attempt to realize the EHV power transmission line in Korea so that the additional study is necessary on the kind and size of conductors, the necessary number of insulators and the suitable clearance distances between conductor and steel tower or earth from the technical and economical view points. These are necessary steps to be taken by the writer before getting into the calculation on the transient stablity of the power system.

  • PDF

A study for the system voltage and reactive power control (계통전압.무효전력 제어에 관한 연구)

  • 송길영
    • 전기의세계
    • /
    • v.14 no.3
    • /
    • pp.10-17
    • /
    • 1965
  • This paper presents a method of the voltage-reactive power control in the long and short range operations and introduces a conception, "optimum control pattern." The optimum control pattern, aiming at the over-all system control, is defined as the optimum voltage distribution which minimizes the system operating cost under the conditions that the specified power be supplied and the system voltage be kept within the specified bounds. The following procedure was adopted to obtain this optimum pattern. In the first place, a power system was divided into three blocks, namely, load, substation and generator. Lagrange's, multiplier method is applied to each block in turn, paying attention only at the operating voltage distribution. Phase angles at each bus are then modified so that the continuity of active power is maintained. This procedure may be called "block relaxation method with Lagrange's multipliers." In a long range operation, this control pattern determines the optimum installation capacity of reactive power sources. In a short range operation, it also gives the reference state of real time control and the optimum switching capacity of reactive power souces. The real time control problem is also studied from the standpoint of cooperation of control devices such as generators, shunt capacitors, shunt reactors and ratio load controllers. A proposal for the real time control will contribute to the automation of power system operation in the near future. in the near future.

  • PDF

Fabrication of Nd-Substituted Bi4Ti3O12 Thin Films by Metal Organic Chemical Vapor Deposition and Their Ferroelectrical Characterization

  • Kim, Hyoeng-Ki;Kang, Dong-Kyun;Kim, Byong-Ho
    • Journal of the Korean Ceramic Society
    • /
    • v.42 no.4
    • /
    • pp.219-223
    • /
    • 2005
  • A promising capacitor, which has conformable step coverage and good uniformity of thickness and composition, is needed to manufacture high-density non-volatile FeRAM capacitors with a stacked cell structure. In this study, ferroelectric $Bi_{3.61}Nd_{0.39}Ti_3O_{12}$ (BNdT) thin films were prepared on $Pt(111)/TiO_2/SiO_2/Si$ substrates by the liquid delivery system MOCVD method. In these experiments, $Bi(ph)_{3}$, $Nd(TMHD)\_{3}$ and $Ti(O^iPr)_{2}(TMHD)_{2}$ were used as the precursors and were dissolved in n-butyl acetate. The BNdT thin films were deposited at a substrate temperature and reactor pressure of approximately $600^{\circ}C$ and 4.8 Torr, respectively. The microstructure of the layered perovskite phase was observed by XRD and SEM. The remanent polarization value (2Pr) of the BNdT thin film was $31.67\;{\mu}C/cm^{2}$ at an applied voltage of 5 V.