• Journal of Applied Biological Chemistry
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• v.48 no.4
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• pp.170-177
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• 2005

Oriental medicinal herb extracts (OHE) showing anticancer activities were investigated for effectiveness as antiviral drugs. Infection of MuLV to cell line resulted in formation of giant syncytia. Number of giant syncytia in culture treated with OHE decreased by 40% compared to that of non-OHE-treated cell culture. To determine OHE effects on progeny release, RT-PCR was performed. In vivo animal studies demonstrated effectiveness of OHE as antiviral drug when administered orally. After OHE administration, viral cytopathic effects decreased. Infected mice showed splenomegaly and over-proliferation of lymphocytes with decreased CD4+ cell counts. These symptoms decreased in OHE-treated mice, indicating OHE maybe useful therapeutics against MuLV/MAIDS as Human Immunodeficiency Virus (HIV)/AIDS animal model. Results show XC plaque assay and in vivo MAIDS model using MuLV are suitable tools for screening anti-retroviral drug candidates.

• Journal of the Korean Magnetic Resonance Society
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• v.6 no.1
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• pp.38-44
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• 2002

60% Pt on Vulcan XC-72 with similar Pt sizes to fuel cell grade Pt black was investigated by $\^$13/C nuclear magnetic resonance spectroscopy (NMR), cyclic voltammery (CV), transmission electron microscopy (TEM). Experiments were carried out on electrochemically cleaned samples as well as as-received. The TEM and CV results showed that the average particle sizes were changed by cleaning. However, the chemical shift （$\delta$$\_$G/） of $\^$13/C of $\^$13/CO absorbed on Pt surfaces did not show any appreciable variation with particle size change as did in Pt black. These results indicate that a combination of different analytic techniques is essential to understand the properties of the metal particle catalysts and that the presence of carbon black support strongly influences the NMR data, probably through metal-support interaction.

• Proceedings of the KIEE Conference
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• 2006.10c
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• pp.397-400
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• 2006

Recent trend on high speed packet processing for providing multiple internet services is to use network processor instead of being implemented by legacy ASIC or FPGA. Most frequently used network processor interface is the SPI4.2. This paper address the data-rate conversion interface device between SPI4.2 and SPI3/CSIX, implemented using XILINX XC2VP40 FPGA. Furthermore, we address the methodology and necessity of flow control occurred due to the data rate difference between 10Gbps and 3.2 Gbps.

• IEMEK Journal of Embedded Systems and Applications
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• v.7 no.4
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• pp.173-179
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• 2012

In this paper, we propose an efficient architecture for 2D IWT using an existing 1D IWT. Lifting based IWT is the architecture of which a multiplier is replaced by adders and shift registers. The structure is relatively simple and modular. The proposed architecture to process an image size with 256x256 pixels consists of 16 adders, 8 shift registers, and some memories. By processing two rows at the same time, 2D sub-band coefficients can be calculated immediately after 1D sub-band coefficients have been processed. The architecture is designed so that each image can be inputted consecutively. The number of adders and shift registers is increased by twice comparing the existing architecture, but the memory size and the execution time are decreased by half. The proposed architecture is implemented using Verilog-HDL and simulated using iSim. It is synthesized and demonstrated at ISE for xc5vlx330 in RPS3K board.

• Journal of Industrial Technology
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• v.24 no.A
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• pp.91-97
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• 2004

This paper describes the design of a 2-phase stepping motor driver using CPLD(Complex Programmable Logic Device). The driver IC such as L297(SGS-Thomson Microelectronics), which is mostly used has some difficulties in PWM control because of the switching noise of power MOSFETs. It causes current ripple and acoustic noise. To improve theses characteristics, we proposed a new current control method that the output PWM frequency is almost constant using a digital filter. Also we proposed constant current method for 1-2 phase(half step) excitation. The proposed method is implemented with CPLD(Xilinx, XC9572-PC44). Experimental results show the effectiveness of the proposed method.

• 한국전기화학회:학술대회논문집
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• 2001.06a
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• pp.179-184
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• 2001

The diffusion layer within MEA(membrane electrode assembly) has been evaluated important factor for improvement of cell performance in DMFC. The diffusion layer in MEA structure leads to the reduction of catalyst loss in active catalysts layer as well as prevention of water-flooding in cathode. Cell performance is directly affected by interior properties of diffusion layer materials. Acetylene Black and $RuO_2$ with large pore size and low porosity compared to Vulcan XC-72R gave better performance caused by vigorous methanol diffusion and water removal. And $RuO_2$ as diffusion layer materials showed different behavior in anode and cathode compartment, that is, diffusion layers in anode and cathode side make methanol diffusion and water removal facilitate, respectively.

• Journal of Power Electronics
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• v.10 no.1
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• pp.65-71
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• 2010

This paper presents the design and implementation of voltage source inverter type SVPWM based speed control of an induction motor using a fuzzy PI controller. This scheme enables us to adjust the speed of the motor by controlling the frequency and amplitude of the stator voltage; the ratio of the stator voltage to the frequency should be kept constant. A model of the fuzzy control system is implemented in real time with a Xilinx FPGA XC3S 400E. It is introduced to maintain a constant speed to when the load varies.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.10
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• pp.8-18
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• 1997

In FPGAs, we may use the property of the routing architecture for their routing compared to the routing in the conventional layout style. Especially, the Xilinx XC4000 series FPGAs have very special routing architecture in which the routing problem is equivalent to the two dimensional track assignment problem. In this paper, we propose a new FPgA detailed routing method by developing a two dimensional trackassigment heuristic algorithm. The proposed routing mehtod accept a global routing result as an input and obtain a detailed routing such that the number of necessary wire segments in each connection block is minimized. For all benchmark circuits tested, our routing methd complete routing results. The number of used tracks are also similar to the results by thedirect routing methods.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.959-962
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• 1999

예전에 일반적인 DC모터제어 또는 전류 량 제어 분야에만 사용되던 펄스 폭 변조기 형태의 부품이 근래에는 멀티미디어 단말장치의 한 부품으로 사용되고 있는데 본 논문에서는 비디오 신호처리 및 영상보드에서 간편하게 사용될 수 있는 PWM 모듈을 설계하였다. 단말장치의 주변 칩에서 사용되는 일반적인 내장형 모듈을 사용하게 되면, 멀티채널을 요하는 시스템에서 채널의 부족으로 인해 여러 개일 마이크로 콘트롤러를 사용해야 하는 단점이 있다. 이 때문에 내장형으로 사용될 수도 있으며, 독립적으로도 동작할 수 있는 구조가 필요하며 정적으로 동작해야 하는 시스템에도 이식될 수 있는 기능도 동시에 가지고 있어야 한다. 본 논문에서는 이러한 기능을 만족시키기 위한 진보된 PMW 모듈의 구조를 제안하였으며, 이를 VHDL로 기술하여 기능을 검증하고, XC4010XL-PC84 FPGA로 구현하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.6
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• pp.736-744
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• 2016

Network on chip (NoC) is an emerging technology in the field of multi core interconnection architecture. The routers plays an essential components of Network on chip and responsible for packet delivery by selecting shortest path between source and destination. State-of-the-art NoC designs used routing table to find the shortest path and supports four ports for packet transfer, which consume high power consumption and degrades the system performance. In this paper, the multi port multi core router architecture is proposed to reduce the power consumption and increasing the throughput of the system. The shared buffer is employed between the multi ports of the router architecture. The performance of the proposed router is analyzed in terms of power and current consumption with conventional methods. The proposed system uses Modelsim software for simulation purposes and Xilinx Project Navigator for synthesis purposes. The proposed architecture consumes 31 mW on CPLD XC2C64A processor.