• Title/Summary/Keyword: XOR 연산

Search Result 166, Processing Time 0.022 seconds

Design of System for Avoiding upload of Identical-file using SA Hash Algorithm (SA 해쉬 알고리즘을 이용한 중복파일 업로드 방지 시스템 설계)

  • Hwang, Sung-Min;Kim, Seog-Gyu
    • Journal of the Korea Society of Computer and Information
    • /
    • v.19 no.10
    • /
    • pp.81-89
    • /
    • 2014
  • In this paper, we propose SA hash algorithm to avoid upload identical files and design server system using proposed SA hash algorithm. Client to want to upload file examines the value of SA hash and if the same file is found in server system client use the existing file without upload. SA hash algorithm which is able to examine the identical-file divides original file into blocks of n bits. Original file's mod i bit and output hash value's i bit is calculated with XOR operation. It is SA hash algorithm's main routine to repeat the calculation with XOR until the end of original file. Using SA hash algorithm which is more efficient than MD5, SHA-1 and SHA-2, we can design server system to avoid uploading identical file and save storage capacity and upload-time of server system.

Low System Complexity Parallel Multiplier for a Class of Finite Fields based on AOP (시스템 복잡도 개선을 위한 AOP 기반의 병렬 유한체 승산기)

  • 변기영;나기수;윤병희;최영희;한성일;김흥수
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.29 no.3A
    • /
    • pp.331-336
    • /
    • 2004
  • This study focuses on the hardware implementation of fast and low-system-complexity multiplier over GF(2$^{m}$ ). From the properties of an irreducible AOP of degree m. the modular reduction in GF(2$^{m}$ ) multiplicative operation can be simplified using cyclic shift operation. And then, GF(2$^{m}$ ) multiplicative operation can be established using the away structure of AND and XOR gates. The proposed multiplier is composed of m(m+1) 2-input AND gates and (m+1)$^2$ 2-input XOR gates. And the minimum critical path delay is Τ$_{A+}$〔lo $g_2$$^{m}$ 〕Τ$_{x}$ proposed multiplier obtained have low circuit complexity and delay time, and the interconnections of the circuit are regular, well-suited for VLSI realization.n.

Single Path Phase-only Security System using Phase-encoded XOR Operations in Fourier Plane (푸리에 영역에서의 위상 변조 Exclusive-OR 연산을 이용한 단일 경로 위상 암호화 시스템)

  • Shin, Chang-Mok;Cho, Kyu-Bo;Kim, Soo-Joong;Noh, Duck-Soo
    • Korean Journal of Optics and Photonics
    • /
    • v.16 no.4
    • /
    • pp.326-333
    • /
    • 2005
  • Phase-only encryption scheme using exclusive-OR rules in Fourier plane and a single path decryption system are presented. A zero-padded original image, multiplied by a random phase image, is Fourier transformed and its real-valued data is encrypted with key data by using XOR rules. A decryption is simply performed based on 2-1 setup with spatial filter by Fourier transform for multiplying phase-only encrypted data by phase-only key data, which are obtained by phase-encoding process, and spatial filtering for zero-order elimination in inverse-Fourier plane. Since the encryption process is peformed in Fourier plane, proposed encryption scheme is more tolerant to loss of key information by scratching or cutting than previous XOR encryption method in space domain. Compare with previous phase-visualization systems, due to the simple architecture without a reference wave, our system is basically robust to mechanical vibrations and fluctuations. Numerical simulations have confirmed the proposed technique as high-level encryption and simple decryption architecture.

Handover Authentication Protocol in VANET Supporting the Fast Mobility (빠른 이동성을 지원하는 VANET 환경의 핸드오버 인증 프로토콜)

  • Choi, Jae-Duck;Jung, Sou-Hwan
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.45 no.5
    • /
    • pp.30-39
    • /
    • 2008
  • This paper proposes a secure and efficient handover authentication protocol in VANET supporting fast mobility. Although the existing schemes commonly use the hash function or XOR operation to be suitable for a light-weight mobile, it does not support the security feature such as PBS. To solve this security problem, another protocol utilizing the CGA technology is proposed but it is vulnerable to the DoS attack due to a number of exponent operations. The proposed protocol using a light-weight Diffie-Hellman provides security features and performs a reduced number of exponential operation at the MN than the existing scheme.

Cryptanalysis and Improvement of a New Ultralightweight RFID Authentication Protocol with Permutation (순열을 사용한 새로운 초경량 RFID 인증 프로토콜에 대한 보안 분석 및 개선)

  • Jeon, Il-Soo;Yoon, Eun-Jun
    • Journal of Korea Society of Industrial Information Systems
    • /
    • v.17 no.6
    • /
    • pp.1-9
    • /
    • 2012
  • Low-cost RFID tags are used in many applications. However, since it has very limited power of computation and storage, it's not easy to make a RFID mutual authentication protocol which can resist from the various security attacks. Quite recently, Tian et al. proposed a new ultralightweight authentication protocol (RAPP) for low-cost RFID tags using the low computation cost operations; XOR, rotation, and permutation operations, which is able to resist from the various security attacks. In this paper, we show that RAPP is vulnerable to the de-synchronization attack and present an improved RAPP which overcomes the vulnerability of RAPP.

Suggestion of CPA Attack and Countermeasure for Super-Light Block Cryptographic CHAM (초경량 블록 암호 CHAM에 대한 CPA 공격과 대응기법 제안)

  • Kim, Hyun-Jun;Kim, Kyung-Ho;Kwon, Hyeok-Dong;Seo, Hwa-Jeong
    • KIPS Transactions on Computer and Communication Systems
    • /
    • v.9 no.5
    • /
    • pp.107-112
    • /
    • 2020
  • Ultra-lightweight password CHAM is an algorithm with efficient addition, rotation and XOR operations on resource constrained devices. CHAM shows high computational performance, especially on IoT platforms. However, lightweight block encryption algorithms used on the Internet of Things may be vulnerable to side channel analysis. In this paper, we demonstrate the vulnerability to side channel attack by attempting a first power analysis attack against CHAM. In addition, a safe algorithm was proposed and implemented by applying a masking technique to safely defend the attack. This implementation implements an efficient and secure CHAM block cipher using the instruction set of an 8-bit AVR processor.

Amplified Boomerang Attack against Reduced-Round SHACAL (SHACAL의 축소 라운드에 대한 확장된 부메랑 공격)

  • 김종성;문덕재;이원일;홍석희;이상진
    • Journal of the Korea Institute of Information Security & Cryptology
    • /
    • v.12 no.5
    • /
    • pp.87-93
    • /
    • 2002
  • SHACAL is based on the hash standard SHA-1 used in encryption mode, as a submission to NESSIE. SHACAL uses the XOR, modular addition operation and the functions of bit-by-bit manner. These operations and functions make the differential cryptanalysis difficult, i.e, we hardly find a long differential with high probability. But, we can find short differentials with high probability. Using this fact, we discuss the security of SHACAL against the amplified boomerang attack. We find a 36-step boomerang-distinguisher and present attacks on reduced-round SHACAL with various key sizes. We can attack 39-step with 256-bit key, and 47-step with 512-bit key.

Implementation of a Feed-Forward Neural Network on an FPGA Chip for Classification of Nonlinear Patterns (비선형 패턴 분류를 위한 FPGA를 이용한 신경회로망 시스템 구현)

  • Lee, Woon-Kyu;Kim, Jeong-Seob;Jung, Seul
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.45 no.1
    • /
    • pp.20-27
    • /
    • 2008
  • In this paper, a nonlinear classifier of a feed-forward neural network is implemented on an FPGA chip. The feedforward neural network is implemented in hardware for fast parallel processing. After off line training of neural network, weight values are saved and used to perform forward propagation of neural processing. As an example, AND and XOR digital logic classification is conducted in off line, and then weight values are used in neural network. Experiments are conducted successfully and confirmed that the FPGA neural network hardware works well.

A Light-weight Pair-wise Key Generation Scheme using Time value (시간값을 이용한 경량의 Pair-wise 키 생성 기법)

  • Jung, Jin-Ho;Lee, JongHyup;Song, JooSeok
    • Proceedings of the Korea Information Processing Society Conference
    • /
    • 2009.04a
    • /
    • pp.1406-1407
    • /
    • 2009
  • 본 연구에서는 하드웨어적으로 제한사항이 있는 장비에서 최소한의 보안성을 제공하기 위해 XOR 방식의 Pair-wise 키값을 생성하는 간단한 보안기법을 제안한다. 제안한 보안 기법은 Random Key Predistribution 을 통하여 장비별 시간값과 고유값을 XOR 하여 서로 교환한 후, 상호 교환한 값을 다시 XOR 하여 두 장비간의 Pair-wise 키값을 생성한다. 이후, 지속적으로 변화되는 시간값으로 인해 매 통신시마다 다른 Pair-wise 키값을 사용할 수 있을 것이다. 기존의 보안알고리즘(DES, AES 등)의 연산 보다 매우 간단하고, 노드별 독특한 키 변화패턴을 통하여 키 유출이 어려우며, 장비가 캡처당하는 공격이 발생하더라도 전체 네트워크의 보안성이 저하되지 않는다는 장점을 가진다.

Detecting Shared Resource Usage Errors with Global Predicates (광역조건식에 의한 공유자원 접근오류 검색)

  • Lee, Eun-Jeong;Yun, Gi-Jung
    • Journal of KIISE:Software and Applications
    • /
    • v.26 no.12
    • /
    • pp.1445-1454
    • /
    • 1999
  • 광역 조건식의 계산은 분산 프로그램의 수행을 테스트 또는 디버깅하기 위한 방법으로 활 발히 연구되고 있다. 이제까지 주로 연구된 광역조건식은 AND 또는 OR 광역 조건식 등이 있는데, 특히 AND 광역 조건식은 분산 프로그램의 동시적 조건을 표현하는데 유용하여 효율적인 검색 알고리즘이 활발히 연구되었다. 분산프로그램의 수행오류로서 공유자원의 배타적 접근조건은 가장 중요하고 일반적인 경우라 할 수 있다. 본 논문에서는 XOR 연산을 이용하여 공유자원 프로그램의 오류 검색을 위한 광역조건식을 기술하는 방식에 대해 제안하였다. XOR 연산을 이용한 광역 조건식은 연산자 중 많아야 하나의 지역조건식만이 참일 때 전체 조건식이 참이 되는데 이러한 성질은 여러 프로세스 중 한번에 하나만이 공유자원에 배타적으로 접근할 수 있는 조건을 표현하는데 매우 유용하다. n 개의 프로세스로 이루어진 분산프로그램에서 한개의 공유자원에 대한 배타적 접근 조건을 기술하기 위해서 AND로 연결된 광역조건식을 이용하면 O(n2)개의 광역 조건식이 필요한데 반해 XOR 연산으로는 하나의 조건식으로 나타낼 수 있다. 더구나 XOR 연산을 이용한 광역조건식은 최근 소개된 겹치는 구간의 개념을 활용하면 매우 간단하게 검색할 수 있다. 본 논문에서는 겹치는 구간을 찾는 검색 알고리즘을 소개하고 증명하였다.Abstract Detecting global predicates is an useful tool for debugging and testing a distributed program. Past research has considered several restricted forms of predicates, including conjunctive or disjunctive form of predicates. Especially, conjunctive predicates have attracted main attention not only because they are useful to describe simultaneous conditions in a distributed program, but also because it is possible to find algorithms to evaluate them within reasonable time bound. Detecting errors in accessing shared resources are the most popular and important constraints of distributed programs. In this paper, we introduced an exclusive OR predicates as a model of global predicates to describe shared resource conditions in distributed programs. An exclusive OR predicate holds only when at most one operand is true, which is useful to describe mutual exclusion conditions of distributed programs where only one process should be allowed to access the shared resource at a time. One exclusive OR predicate is enough to describe mutual exclusion condition of n processes with one shared resource, while it takes O(n2) conjunctive predicates. Moreover, exclusive OR condition is easily detectable using the concept of overlapping intervals introduced by Venkatesan and Dathan. An off-line algorithm for evaluating exclusive OR global predicates is presented with a correctness proof.