• 제목/요약/키워드: With/Without shunt capacitance

검색결과 6건 처리시간 0.019초

An Improved Technique for Fault Location Estimation Considering Shunt Capacitance on Transmission Line

  • Kim Hyun-Houng;Jeong Yun-Won;Lee Chan-Joo;Park Jong-Bae;Shin Joong-Rin
    • Journal of Electrical Engineering and Technology
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    • 제1권3호
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    • pp.295-301
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    • 2006
  • This paper presents a new two-terminal numerical algorithm for fault location estimation using the synchronized phasor in time-domain. The proposed algorithm is also based on the synchronized voltage and current phasor measured from the PMUs (Phasor Measurement Units) installed at both ends of the transmission lines. In this paper, the algorithm is given without shunt capacitance and with shunt capacitance using II -model and estimated using DFT (Discrete Fourier Transform) and LES (Least Error Squares Method). The algorithm uses a very short data window and classification for real-time transmission line protection. To verify the validity of the proposed algorithm, the Electro-Magnetic Transient Program (EMTP) and MATLAB are used.

장거리 송전선로를 고려한 사고거리추정 수치해석 알고리즘 (A Numerical Algorithm for Fault Location Estimation Considering Long-Transmission Line)

  • 김병만;채명석;강용철
    • 전기학회논문지
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    • 제57권12호
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    • pp.2139-2146
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    • 2008
  • This paper presents a numerical algorithm for fault location estimation which used to data from both end of the transmission line. The proposed algorithm is also based on the synchronized voltage and current phasor measured from the PMUs(Phasor Measurement Units) in the time-domain. This paper has separated from two part of with/without shunt capacitance(short/long distance). Most fault was arc one-ground fault which is 75% over [1]. so most study focused with it. In this paper, the numerical algorithm has calculated to distance for ground fault and line-line fault. In this paper, the algorithm is given with/without shunt capacitance using II parameter line model, simple impedance model and estimated using DFT(Discrete Fourier Transform) and the LES(Least Error Squares Method). To verify the validity of the proposed algorithm, the EMTP(Electro- Magnetic Transient Program) and MATLAB did used.

Application of Generalized Transmission Line Models to Mixed Ionic-Electronic Transport Phenomena

  • Ahn, Pyung-An;Shin, Eui-Chol;Kim, Gye-Rok;Lee, Jong-Sook
    • 한국세라믹학회지
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    • 제48권6호
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    • pp.549-558
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    • 2011
  • Application of a generalized equivalent circuit including the electrode condition for the Hebb-Wagner polarization in the frequency domain proposed by Jamnik and Maier can provide a consistent set of material parameters, such as the geometric capacitance, partial conductivities, chemical capacitance or diffusivity, as well as electrode characteristics. Generalization of the shunt capacitors for the chemical capacitance by the constant phase elements (CPEs) was applied to a model mixed conducting system, $Ag_2S$, with electron-blocking AgI electrodes and ion-blocking Pt electrodes. While little difference resulted for the electron-blocking cell with almost ideal Warburg behavior, severely non-ideal behavior in the case of Pt electrodes not only necessitates a generalized transmission line model with shunt CPEs but also requires modelling of the leakage in the cell approximately proportional to the cell conductance, which then leads to partial conductivity values consistent with the electron-blocking case. Chemical capacitance was found to be closer to the true material property in the electron-blocking cell while excessively high chemical capacitance without expected silver activity dependence resulted in the electron-blocking cell. A chemical storage effect at internal boundaries is suggested to explain the anomalies in the respective blocking configurations.

자동 재폐로기의 동작책무를 위한 아크전압 판정 및 사고거리 표정 알고리즘 (A Numerical Algorithm for Fault Location Estimation and Arc Faults Detection for Auto-Reclosure)

  • 김병만;채명석;정태영;강용철
    • 전기학회논문지
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    • 제58권7호
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    • pp.1294-1303
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    • 2009
  • This paper presents a new numerical algorithm for fault discrimination and fault location estimation when occur to arcing ground and arcing line to line on transmission lines. The object of this paper is developed from new numerical algorithm to calculate the fault distance and simultaneously to make a distinction between transient and permanent faults. so the first of object for propose algorithm would be distinguish the permanent from the transient faults. This arcing fault discrimination algorithm is used if calculated value of arc voltage amplitude is greater than product of arc voltage gradient and the length of the arc path, which is equal or greater than the flashover length of a suspension insulator string[1-3]. Also, each algorithm is separated from short distance and long distance. This is difference to with/without capacitance between short to long distance. To test the validity of the proposed algorithms, the results of algorithm testing through various computer simulations are given. The test was simulated in EMTP/ATP simulator under a number of scenarios and calculate of algorithm was used to MATLAB.

Two-Terminal Numerical Algorithm for Single-Phase Arcing Fault Detection and Fault Location Estimation Based on the Spectral Information

  • Kim, Hyun-Houng;Lee, Chan-Joo;Park, Jong-Bae;Shin, Joong-Rin;Jeong, Sang-Yun
    • Journal of Electrical Engineering and Technology
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    • 제3권4호
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    • pp.460-467
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    • 2008
  • This paper presents a new numerical algorithm for the fault location estimation and arcing fault detection when a single-phase arcing ground fault occurs on a transmission line. The proposed algorithm derived in the spectrum domain is based on the synchronized voltage and current samples measured from the PMUs(Phasor Measurement Units) installed at both ends of the transmission lines. In this paper, the algorithm uses DFT(Discrete Fourier Transform) for estimation. The algorithm uses a short data window for real-time transmission line protection. Also, from the calculated arc voltage amplitude, a decision can be made whether the fault is permanent or transient. The proposed algorithm is tested through computer simulation to show its effectiveness.

Multiplier 설정을 통한 무선 전력 전송 용 CMOS 정류 회로 (CMOS Rectifier for Wireless Power Transmission Using Multiplier Configuration)

  • 정남휘;배윤재;조춘식
    • 전자공학회논문지
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    • 제50권12호
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    • pp.56-62
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    • 2013
  • 우리는 MOSFET Layout 단계에서 Multiplier 구성을 통한 Common centroid layout 방식을 사용한 무선 전력 전송 용 CMOS 정류회로를 제안한다. 제안하는 정류회로는 기존의 다이오드를 사용하지 않은 Cross-coupled MOSFET 정류회로로 13.56 MHz에서 동작한다. 전력 소모를 최소화하고, 높은 주파수까지 동작하기 위하여 Full bridge 정류회로에서 효율을 높이기 위한 비교기를 제거하였다. Layout 단계에서 Multiplier 구성을 통한 Common centroid layout 방식은 Chip-layout 상에서 MOSFER의 Finger에 의해 길어진 연결 선로에 존재하는 기생 직렬 저항과 병렬 Capacitor에 의해 발생하는 시간 지연을 줄이기 위해 고안되어, 천이 시간을 줄여 Cross-coupled 구조의 On-상태에서 Off-상태, 혹은 그 반대의 상태 변화를 빠르게 한다. 이는 빠른 상태 변화 시간으로 인해 전력 변환 효율을 증가시킨다. 본 정류회로는 $0.11{\mu}m$ CMOS 공정으로 제작되었으며, 전력 변환 효율은 최대 86.4%로 측정되었으며, 600 MHz 이상까지 높은 전력 변환 효율을 가지며, 이는 현재 발표된 것 중, Cross-coupled 구성을 기반으로 한 정류회로 중 가장 높은 성능을 가진다.