• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.11
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• pp.1135-1141
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• 2014

Performing wideband DDC while quantizing signal over a wide dynamic range and high speed sampling rate have primarily been implemented in a hardware such as, FPGA or ASIC because of time-consuming job. Real-time wideband DDC SW, even though signal environment changes, adapt to signal environment flexibly and can be reused. In addition, it has a lower price than the hardware implementation. In this paper, we study the system design that can be stored in real time designing a high-speed parallel processing architecture for SW-based wideband DDC. Finally, applying a Ping-Pong Buffering mechanism for receiving a signal in real time and CUDA for a high-speed signal processing, we verify wideband DDC design procedure that meets the signal processing.