• 대한전자공학회논문지
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• 제22권5호
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• pp.57-61
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• 1985

The e(lect of capacitance error on the A/D conversion accuracy in the A/D converter using binary-weighted capacitor array was scruntized. Besides the Monte-Carlo method considering the inter-capacitance ratios as random variables, " correlation approach" con-sidering the correlation coefficient between capacitances is proposed in this paper. Bt was observed by the measurement of capacitances of monolithic MO5 capacitors that the correla-tion coefficient between capacitors decreases as the capacitor size incrrases. It was also verified that the parallel connection of unit capacitors and the common centroid layout scheme signi(icantly increase the inter-capacitance correlation coefficients.

• Journal of Power Electronics
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• 제19권1호
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• pp.89-98
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• 2019

This paper analyzes the input side performance of a conventional three-phase to single-phase matrix converter (3-1MC). It also presents the input-side waveform quality under this topology. The suppression of low-frequency input current harmonics is studied using the 3-1MC plus capacitance compensation unit. The constraint between the modulation function of the output and compensation sides is analyzed, and the relations among the voltage utilization ratio and the output compensation capacitance, filter capacitors and other system parameters are deduced. For a 3-1MC without large-capacity energy storage, the system performance is susceptible to input voltage imbalance. This paper decouples the inner current of the 3-1MC using a Lyapunov function in the input positive and negative sequence bi-coordinate axes. Meanwhile, the outer loop adopts a voltage-weighted synthesis of the output and compensation sides as a cascade of control objects. Experiments show that this strategy suppresses the low-frequency input current harmonics caused by input voltage imbalance, and ensures that the system maintains good static and dynamic performances under input-unbalanced conditions. At the same time, the parameter selection and debugging methods are simple.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 하계종합학술대회논문집
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• pp.863-866
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• 1998

In this paper two quick boosting charge pump circuits for high-speed EEPROM memory are proposed. In order to improve initial charge transfer efficiency, one uses weighted capacitors where each stage has different clock coupling capacitance, and the other uses a multi-path structure at the first stage. SPICE simulation results show that these charge pumps have improve drising-time characteristics, but their $V_{DD}$ mean currents are increased a little compared with conventioanl charge pumps. The rising time upt o 15V of the proposed charge pumps is 3 times faster than that of dickson's pump at the cost of 1.5 tiems more $V_{DD}$ mean current.rrent.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2004년도 추계학술대회
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• pp.613-618
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• 2004

CCS was developed and applied to rotating machines because of accurately measuring the spindle error motion without significant efforts. However, researches on the CCS have been focused on ideal cases where circumferential gaps were ignored. This paper presents the effects of circumferential gaps and proposes an optimal CCS considering the circumferential gaps. First, electrostatic analysis of the CCS that includes the circumferential gaps is performed using the FEM, and an additional capacitance due to the circumferential gap can be approximated as an equivalent extended sensor length. Second, a mathematical model of the CCS considering the circumferential gaps is derived, and the optimal CCS is determined through minimization of the weighted error amplification factor. Finally, two CCSs, both considering and ignoring the circumferential gaps, are built, and the effectiveness of the optimal design is verified through simulation and experiment.

• 전자공학회논문지A
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• 제28A권1호
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• pp.52-59
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• 1991

An effective and accurate delay time model is the key problem in the simulation and timing verification of CMOS logic circuits. We propose a semi-analytic CMOW delay time model taking into account the configuration ratio, the input waveform slope and the load capacitance. This model is based on the Schichman Hodges's DC equations and derived on the optimally weighted switching peak current. The parameters necessary for the model calculation are automatically determined from the program. The proposed model is computationally effective and the error is typically within 10% of the SPICEA results. Compared to the table RC model, the accuracy is inproved over two times in average.

• 대한전자공학회논문지SD
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• 제43권9호
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• pp.10-16
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• 2006

본 논문에서는 PHS 어플리케이션에서 새로운 Coarse Toning 기법을 사용한 빠른 스위칭의 CMOS 주파수 합성기를 기술하였다. 제안한 Coarse Tuning 방법은 Phase Noise와 Lock-Time을 최적화하기 위해 LC-VCO의 적절한 Tuning Capacitances를 선택하는 것이다. 이를 바탕으로 측정된 Lock-Time은 약 $20{\mu}s$ 이고, Phase Noise는 600kHz의 offset에서 -121dBc/Hz이다. 칩은 $0.25{\mu}m$ CMOS 공정으로 제작하였고, 면적은 $0.7mm{\times}2.1mm$ 이다. 소비전력은 2.7V 공급 전압 하에서 54mW 이다.

• 전자공학회논문지C
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• 제36C권4호
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• pp.17-29
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• 1999

본 논문은 데이터 의존적인 CMOS 회로(예: DSP) 의 전력량을 감축하기 위한 상위 수준 합성 기법에 대한 연구이다. 상위수준 합성은 스케줄링, 자원 및 레지스터 할당의 세가지로 나우어서 수행한다. 스케줄링시의 저전력 설계의 목적은 자원할당 시 입력을 재 사용할 수 있는 가능성을 증가시키는 것이다. 스케줄링 후에 자원 및 레지스터 할당 문제는 가중차기 부가된 앙립 그래프로 표현하여 최소비용흐름 알고리즘을 수행함으로써 스위칭 동작횟수가 적은 해를 얻는다. 제안된 알고리즘은 저전력 레지스터 및 자원 할당 문제에 대하여 O({{{{ { n}^{3 } }}}}) (n은 그래프의 노드수) 시간에 최적해를 제공한다. 벤치마크 회로에 대한 실험 결과는 15%의 전력 감축 효과를 나타낸다.

• Nuclear Engineering and Technology
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• 제53권4호
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• pp.1304-1310
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• 2021

Two-phase flow, especially gas-liquid two-phase flow, has a wide application in industrial field. The diagnosis of two-phase flow parameters, which directly determine the flow and heat transfer characteristics, plays an important role in providing the design reference and ensuring the security of online operation of two-phase flow system. Computer tomography (CT) is a good way to diagnose such parameters with imaging method. This paper has proposed a novel image reconstruction method for thermal neutron CT of two-phase flow with improved simulated annealing (ISA) algorithm, which makes full use of the prior information of two-phase flow and the advantage of stochastic searching algorithm. The reconstruction results demonstrate that its reconstruction accuracy is much higher than that of the reconstruction algorithm based on weighted total difference minimization with soft-threshold filtering (WTDM-STF). The proposed method can also be applied to other types of two-phase flow CT modalities (such as X(𝛄)-ray, capacitance, resistance and ultrasound).