• Journal of Multimedia Information System
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• v.7 no.3
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• pp.231-238
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• 2020

This work presents a fully analog baseline wander tracking and removal circuitry using high-pass filter (HPF) based R-peak detection and quadratic interpolation that does not require digital post processing, thus suitable for compact and low power long-term ECG monitoring devices. The proposed method can effectively track and remove baseline wander in ECG waveforms corrupted by various motion artifacts, whereas minimizing the loss of essential features including the QRS-Complex. The key component for tracking the baseline wander is down sampling the moving average of the corrupted ECG waveform followed by quadratic interpolation, where the R-peak samples that distort the baseline tracking are excluded from the moving average by using a HPF based approach. The proposed circuit is designed using CMOS 0.18-㎛ technology (1.8V supply) with power consumption of 19.1 ㎼ and estimated area of 15.5 ㎟ using a 4^th order HPF and quadratic interpolation. Results show SNR improvement of 10 dB after removing the baseline wander from the corrupted ECG waveform.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.20 no.5
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• pp.57-63
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• 2006

This paper deals with the physical properties and statistical analysis of waveform parameters of electric and magnetic folds radiated from lightning return strokes. The lightning electric and magnetic fields were detected by an plate-type electric field sensor and a loop-type magnetic field sensor respectively, and they were recorded by a data acquisition system having a resolution of 12bits, a sampling rate of 10[MS/s] and recording length of 10[ms]. As a result, a little difference between the parameters of electric and magnetic fields for positive and negative polarities was observed. The rise times of electric and magnetic fields were within the range of less than $13[{\mu}s]$ and the average values for positive and negative polarities were $4.1[{\mu}s]\;and\;4.2[{\mu}s]$, respectively. The average values of the zero-to zero crossing times were $65.2[{\mu}s]\;and\;67.0[{\mu}s]$, and the average depths of the dip to opposite polarity were 38.0[%] and 40.3[%], for positive and negative polarities, respectively.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.9
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• pp.68-73
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• 2013

In this paper, we proposed a readout circuit of pulse waveform and rate for a U-health system to monitor health condition. For long-time operation without replacing or charging a battery, either pulse waveform or pulse rate is selected as the output data of the proposed readout circuit according to health condition of a user. The proposed readout circuit consists of a simple digital logic discriminator and a dual-mode ADC which operates in the ADC mode or in the count mode. Firstly, the readout circuit counts pulse rate for 4 seconds in the count mode using the dual-mode ADC. Health condition is examined after the counted pulse rate is accumulated for 1 minute in the discriminator. If the pulse rate is out of the preset normal range, the dual-mode ADC operates in the ADC mode where pulse waveform is converted into 10-bit digital data with the sampling frequency of 1 kHz. These data are stored in a buffer and transmitted by 620 kbps to an external monitor through a RF transmitter. The data transmission period of the RF transmitter depends on the operation mode. It is generally 1 minute in the normal situation or 1 ms in the emergency situation. The proposed readout circuit was designed with $0.11{\mu}m$ process technology. The chip area is $460{\times}800{\mu}m^2$. According to measurement, the power consumption is $161.8{\mu}W$ in the count mode and $507.3{\mu}W$ in the ADC mode with the operating voltage of 1 V.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.5
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• pp.1051-1060
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• 2014

In this paper, performance of an orthogonal frequency division multiplexing (OFDM) system in an impulsive noise environment is analyzed. Here, it is verified that performance of the OFDM system with window nonlinearity, which is one of the impulsive noise mitigation algorithms, is dependent on the over-sampling rate and the size of window. With respect to the variation of those parameters, we also provide an appropriate region of threshold values that control amplitudes of the sampled waveform of received signals. As a result, a new combination of parameters which improves error performance of OFDM system in an impulsive noise environment as compared to the previously reported parameters is presented.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.4
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• pp.463-470
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• 2014

A Verilog model is proposed for transmission lines to perform the all-Verilog simulation of high-speed chip-to-chip interface system, which reduces the simulation time by around 770 times compared to the mixed-mode simulation. The single-pulse response of transmission line in SPICE model is converted into that in Verilog model by converting the full-scale analog signal into an 11-bit digital code after uniform time sampling. The receiver waveform of transmission line is calculated by adding or subtracting the single-pulse response in Verilog model depending on the transmitting digital code values with appropriate time delay. The application of this work to a USB 2.0 high-speed PHY interface reduces the simulation time to less than three minutes with error less than 5% while the mixed-mode simulation takes more than two days for the same circuit.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.12 no.1
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• pp.93-102
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• 1998

This paper describes to control system for AC to DC converter which has been widely used to power source in industrial factory and domestics. In this paper, three-phase PWM AC to DC Boost converter that operates with unity power factor and sinusodial input line currents is presented. The current control of this converter is based on the predicted current control strategy with fixed switching frequency and the line currents track to reference currents within one sampling time interval. By using this control strategy low ripples in the output current and the voltage as well as fast dynamic response are achieved with small dc link capacitance employed.ployed.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.5
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• pp.558-565
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• 2013

In this paper, modeling and simulation for performance analysis of high resolution SAR system has been carried out in the time, frequency and numeric domain using ADS Ptolemy simulation tool of Agilent corporation. SAR system consists of antenna, controller and transceiver. Error parameters affecting SAR system performances have been defined, modeled and simulated such as phase noise of frequency synthesizer, amplitude and phase characteristic of TWTA, sampling frequency of waveform generator and I/Q imbalance. Finally, the development requirements of SAR system based on the impulse response function have been derived.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.11
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• pp.2021-2026
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• 2007

In the parer, we design a non-coherent UWB system by adopting the architecture of a simplified asynchronous transmission and the edge-triggered pulse transmission, which makes e system performance independent of the share of the transmitted waveform, robust to multipath channels. The designed non-coherent UWB transceiver architecture has an advantage of the simple realization since any mixer, high-speed correlator, and high-sampling A/D converter are not necessary at the cost of performance degradation of about 3dB. Further, the designed non-coherent UWB transceiver is actually implemented with the wireless CANVAS prototype testbed in short range indoor application environments such as a lecture room. The implemented prototype testbed is proven to offer the data rate of 115kbps on the conditions of Peer-to-Peer(P-to-P) in the indoor channel within the range of about 10m.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.44 no.5
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• pp.62-70
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• 2007

In this paper, the boost Power Factor Correction(PFC) technique for Direct Torque Control(DTC) of brushless DC motor drive in the constant torque region is implemented on a TMS320F2812DSP. Unlike conventional six-step PWM current control, by properly selecting the inverter voltage space vectors of the two-phase conduction mode from a simple look-up table at a predefined sampling time, the desired quasi-square wave current is obtained, therefore a much faster torque response is achieved compared to conventional current control. Furthermore, to eliminate the low-frequency torque oscillations caused by the non-ideal trapezoidal shape of the actual back-EMF waveform of the BLDC motor, a pre-stored back-EMF versus position look-up table is designed. The duty cycle of the boost converter is determined by a control algorithm based on the input voltage, output voltage which is the dc-link of the BLDC motor drive, and inductor current using average current control method with input voltage feed-forward compensation during each sampling period of the drive system. With the emergence of high-speed digital signal processors(DSPs), both PFC and simple DTC algorithms can be executed during a single sampling period of the BLDC motor drive. In the proposed method, since no PWM algorithm is required for DTC or BLDC motor drive, only one PWM output for the boost converter with 80 kHz switching frequency is used in a TMS320F2812 DSP. The validity and effectiveness of the proposed DTC of BLDC motor drive scheme with PFC are verified through the experimental results. The test results verify that the proposed PFC for DTC of BLDC motor drive improves power factor considerably from 0.77 to as close as 0.9997 with and without load conditions.

• Journal of the Korean Institute of Telematics and Electronics
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• v.21 no.3
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• pp.73-83
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• 1984

The performances of embedded adaptive differential pulse code modulation (ADPCM), embedded adaptive delta modulation (ADM), and the same systems with a delayedfecision scheme have been studied with real speech over a wide dynamic range. The embedded ADPCM and ADM coders have been obtained by modifying the conventional ADPCM and ADM coders. The basic scheme of the embedded ADPCM coder is based on the ADPCM originally proposed by Cummiskey et at. For embedded ADM systems, we have modified continuously variable slope DM (CVSD) and hybrid commanding DM (HCDM) systems. Among these embedded coders, the performance of the embedded HCDM is superior to the other coders over a wide range of transmission rate from 16 to 64 kbits/s, When the delayedtecision scheme is applied to the embedded ADPCM the performance is improved significantly at all transmission rates. But, in the embedded ADM systems with 16 kHz sampling rate, the performance improvement resulting from delayed decision is not drastic as is in the embedded ADPCM with the same number of delayed samples.