• 한국정밀공학회지
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• 제21권10호
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• pp.26-33
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• 2004

Ultra precision grinding technology has been developed from the refinement of the abrasive, the development of high stiffness equipment and grinding skill. The conventional wafering process which consists of lapping, etching, 1 st, 2nd and 3rd polishing has been changed to the new process which consists of precision surface grinding, final polishing and post cleaning. Especially, the ultra precision grinding of wafer improves the flatness of wafer and the efficiency of production. Furthermore, it has been not only used in bare wafer grinding, but also applied to wafer back grinding and SOI wafer grinding. This paper focuses on the flatness of the ground wafer. Generally, the ground wafer has concave pronto because of the difference of wheel path density, grinding temperature and elastic deformation of the equipment. Wafer tilting is applied to avoid non-uniform material removal. Through the geometric analysis of wafer grinding process, the profile of the ground wafer is predicted by the development of profile simulator.

• Tribology and Lubricants
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• 제32권2호
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• pp.44-49
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• 2016

Diamond mechanical polishing (DMP) is a crucial process in a sapphire wafering process to improve flatness and achieve the target thickness by using free abrasives. In a DMP process, material removal rate (MRR) is a key factor to reduce process time and cost. Controlling mechanical parameters, such as velocity and pressure, can increase the MRR in a DMP process. However, there are limitations of using high velocities and pressures for achieving a high MRR owing to their side effects. In this paper, we present the lapping characteristics and improvement of MRR by using a fixed abrasive plate through an experimental study. The change in MRR as a function of velocity and pressure follows Preston's equation. The surface roughness of a wafer decreases as the plate velocity and pressure increases. We observe a sharp decrease in MRR over the lapping time at a high velocity and pressure in the velocity and pressure test. An analysis of surface roughness (Rq and Rpk) indicates that wear of abrasives decreases the MRR sharply. In order to investigate the effect of abrasive wear on the MRR, we utilize a cutting fluid and a rough wafer. The cutting fluid delays the wear of abrasives resulting in improvement of MRR drop. The rough wafer maintains the MRR at a stable rate by self-dressing.

• 자원리싸이클링
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• 제22권2호
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• pp.37-43
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• 2013

다이아몬드 입자를 전착한 와이어를 사용하여 실리콘 잉곳을 슬라이싱 하는 방식은 기존의 슬러리를 사용하는 방식과 달리 절단매체인 실리콘카바이드를 사용하지 않기 때문에 웨이퍼링 후에 발생하는 슬러지에 함유되어 있는 고형분의 대부분은 잉곳으로부터 분리되어 나온 실리콘 성분으로 구성되어 있다. 따라서 슬러지에 함유되어 있는 액상성분만 제거하여도 어렵지 않게 90% 이상의 순도를 가지는 실리콘을 회수할 수 있는 이점이 있다. 본 연구에서 다이아몬드 와이어 쏘잉 방식에서 배출된 슬러지로부터 오일 성분을 제거하여 고품위 실리콘 분말을 회수하였으며, 성형 및 소결공정을 통하여 실리콘에 포함되어 있는 유기물을 포함한 금속불순물을 제거하고, 미분체 실리콘의 산화가 용이한 점을 활용하여 열산화 공정으로 3N급 순도의 실리카를 제조하였다.

• Tribology and Lubricants
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• 제32권4호
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• pp.119-124
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• 2016

In the sapphire wafering process, lapping is a crucial operation in order to reduce the damaged layer and achieve the target thickness. Many parameters, such as pressure, velocity, abrasive, slurry and plate, affect lapping characteristics. This paper presents an experimental investigation on the effect of the plate groove on the material removal rate and roughness of the wafer. We select the spiral pattern and rectangular type as the groove shapes. We vary the groove density by controlling the groove shape dimension, i.e., the groove width and pitch. As the groove density increases to 0.4, the material removal rate increases and gradually reaches a saturation point. When the groove density is low, the pressing load is mostly supported by the thick film, and only a small amount acts on the abrasives resulting to a low material removal rate. The roughness decreases on increasing the groove density up to 0.3 because thick film makes partial participations of large abrasives which make deep scratches. From these results, we could conclude that the groove affects the contact condition between the wafer and plate. At the same groove density, the pitch has more influence on reducing the film thickness than the groove width. By decreasing the groove density with a smaller pitch and larger groove width, we could achieve a high material removal rate and low roughness. These results would be helpful in understanding the groove effects and determining the appropriate groove design.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.545-545
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• 2008

Poly-Si is an essential material for floating gate in NAND Flash memory. To fabricate this material within region of floating gate, chemical mechanical polishing (CMP) is commonly used process for manufacturing NAND flash memory. We use colloidal silica abrasive with alkaline agent, polymeric additive and organic surfactant to obtain high Poly-Si to SiO2 film selectivity and reduce surface defect in Poly-Si CMP. We already studied about the effects of alkaline agent and polymeric additive. But the effect of organic surfactant in Poly-Si CMP is not clearly defined. So we will examine the function of organic surfactant in Poly-Si CMP with concentration separation test. We expect that surface roughness will be improved with the addition of organic surfactant as the case of wafering CMP. Poly-Si wafer are deposited by low pressure chemical vapor deposition (LPCVD) and oxide film are prepared by the method of plasma-enhanced tetra ethyl ortho silicate (PETEOS). The polishing test will be performed by a Strasbaugh 6EC polisher with an IC1000/Suba IV stacked pad and the pad will be conditioned by ex situ diamond disk. And the thickness difference of wafer between before and after polishing test will be measured by Ellipsometer and Nanospec. The roughness of Poly-Si film will be analyzed by atomic force microscope.

• 한국표면공학회지
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• 제32권3호
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• pp.239-243
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• 1999

At Present, 200mm wafer technology is being applied for commercial fabrications of 64, 128, and 256 M DRAM devices, and 300mm technology will be evolved for 1G DRAM devices in the early 21th century, recognizing limitations of several process technologies. In particular recognition has been realized in harmful effects of surface contamination of trace metals introduced during devicing processes. Such a guide line for surface metal contamination has been proposed as 1E9 and 1E10 atoms/$\textrm{cm}^2$ of individual metal contamination for wafering and devicing of 1G DRAM, respectively, and so its measurement limit should be at least 1E8 atoms/$\textrm{cm}^2$. The detection limit of present measurement systems is 2E9 atoms/$\textrm{cm}^2$ obtainable with TRXFA(Total Reflection X-Ray Fluorescence Analysis). TRXFA is nondestructive and the simplest in terms of operation, and it maps the whole wafer surfaces but needs detection improvement. X-Ray intensity produced with synchrotron accelerator is much higher than that of conventional X-ray sources by order of 4-5 magnitudes. Hence theoretically its reactivity with silicon surfaces is expected to be much higher than the conventional one, realizing improvement of detection limit. X-ray produced with synchrotron accelerator is illuminated at a very low angle with silicon wafer surfaces such as 0.1 degree and reflects totally. Hence informations only from surface can be collected and utilized without overlapping with bulk informations. This study shows the total reflection phenomenon and quantitative improvement of detection limit for metallic contamination. It is confirmed that synchrotron X-ray can be a very promising alternative for realizing improvement of detection limit for the next generation devices.