• Korean Journal of Materials Research
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• v.1 no.3
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• pp.168-174
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• 1991

Ti-silicide was deposited by sputtering the composite target($TiSi_{2.6}$) on single-Si wafers and oxide on them. The heat treatment temperatures by rapid thermal annealing(RTA) have been varied in the range of $600-850^{\circ}C$ for 20seconds. It was not until RTA temperature was $800^{\circ}C$ that a stable $TiSi_2$ was formed, and the value of resistivity of that phase was $27~29{\mu}{\Omega}-cm$, which seems a little higher than that formed by the reactive method. The result of x-ray diffraction peals showed that till $750^{\circ}C$, C49 $TiSi_2$ phase was dominant, but at $800^{\circ}C$, at last, the phase was transformed into a stable C54 $TiSi_2$ phase. And, the result of x-ray photoeletron spectroscopy(XPS) measurements showed that the composition ratio of Ti and Si was 2 1 in the case of specimens treated at $800^{\circ}C$, The surface roughness of $TiSi_2$, which was condidered a weak point, was improved to a superior value of $17{\pm}1nm$, therefore increasing the possibility of applying $TiSi_2$ to semiconductor devices.

• 한국신재생에너지학회:학술대회논문집
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• 2010.06a
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• pp.82.1-82.1
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• 2010

수소화된 비정질 실리콘 박막을 이용한 반도체는 현재 태양전지, 트랜지스터, 매트릭스 배열 및 이미지 센서 등의 분야에서 이용되고 있다. 자세히 이야기 하면, 여러 가지의 광전효과 물질에 대한 특성이 있으며, 가시광선영역에 대하여 > $10^5cm^{-1}$이상의 매우 높은 광흡수계수와 낮은 온도를 갖는 증착공정 등이 있다. 박막의 밴드갭은 약 1.6~1.8eV로서 태양전지의 흡수층과 passivation층으로 적절하다. 여러 가지 종류의 태양전지 중 비정질 실리콘 박막/결정질 실리콘 기판의 구조로 이루어진 이종접합 태양전지는 저온에서 공정이 가능한 대표적인 것으로서 HIT(Heterojunction with Intrinsic Thin layer)구조로 산요사에 의해 제안된 것이다. 이것은 결정질 실리콘 기판과 도핑된 비정질 실리콘 박막사이에 얇은 진성층 비정질실리콘 박막을 삽입함으로서, 캐리어 전송을 좋게하여 실리콘 기판 표면의 passivation효과를 증대시키는 결과를 가지고 온다. 실험실 규모에서는 약 20%이상의 효율을 보이고 있으며, 모듈에서는 19.5%의 높은 효율을 보이고 있어 실리콘 기판을 이용한 고효율 태양전지로서 각광을 받고 있다. 이러한 이종접합 태양전지의 대부분은 단결정 실리콘을 사용하고 있는데, 점차적으로 다결정 실리콘 기판으로 추세가 바뀌고 있어, 여기에 맞는 표면 passivation 공정 및 분석이 필요하다. 본 발표에서는 다결정 실리콘 기판위에 진성층 비정질 실리콘 박막을 유도결합 플라즈마 화학기상 증착법(ICP-CVD)을 이용하여 제조하여 passivation 효과를 분석한다. 일반적으로 ICP는 CCP(coupled charged plasma)에 비해 약 100배 이상 높은 플라즈마 밀도를 가지고 있으며, 이온 충돌같은 표면으로 작용하는 것들이 기존 방식에 비해서 작다라는 장점이 있다. 먼저, 유리기판을 사용하여 ICP-CVD 챔버내에 이송 한 후 플라즈마 파워, 온도 및 가스비(SiH4/H2)에 따른 진성층 비정질 실리콘 박막을 증착 한 후, 밴드갭, 전도도 및 결합구조 등에 대한 결과를 분석한 후, 최적의 값을 가지고 250um의 두께를 갖는 다결정 실리콘을 기판위에 증착을 한다. 두께(1~20nm)에 따라 표면의 passivation이 되는 정도를 QSSPCD(Quasi steady state Photoconductive Decay)법에 의하여 소수캐리어의 이동거리, 재결합율 및 수명 등에 대한 측정 및 분석을 통하여 다결정 실리콘 기판의 passivation effect를 확인한다. 제시된 데이터를 바탕으로 향후 다결정 HIT셀 제조를 통해 태양전지 효율에 대한 특성을 비교하고자 한다.

• Journal of Sensor Science and Technology
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• v.11 no.6
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• pp.342-349
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• 2002

New formation technique of metal oxide sensing film was proposed m this paper. Silicon wafer with Pt electrodes was used as a substrate for depositing metal Sn film. Metal Sn was deposited in the state of not continuous film but only island state. The samples were prepared to obtain the optimal condition of metal Sn deposition. The resistances of deposited Sn onto Pt electrodes amounted to $1\;k{\Omega}$, $5\;k{\Omega}$, $10\;k{\Omega}$ and $50\;k{\Omega}$, respectively. Also The sample with $1,500\;{\AA}$ thickness of Sn was prepared m order to compare sensing properties between conventional type and proposing type. After deposition of metal Sn, $SnO_2$ was formed by thermal oxidation method for 3 hrs. in $O_2$ ambient at $700^{\circ}C$. Surface morphology, crystal structure and surface roughness of oxidized-sensing film were examined by SEM, XRD, and AFM, respectively. From the results of these analyses, the optimal deposition condition of Sn was that the Pt electrode resistance became $10\;k{\Omega}(300\;{\AA})$. Also, the sensing characteristics of fabricated sensing film for various concentrations of butane, propane and carbon monoxide gases were measured at he operating temperatures of $250^{\circ}C$, $300^{\circ}C$ and $350^{\circ}C$, respectively. Although catalyst as not added to the sensing film, it has exhibited the high sensitivity to all the test gases.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.145-145
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• 2008

High-k materials have been paid much more attention for their characteristics with high permittivity to reduce the leakage current through the scaled gate oxide. Among the high-k materials, $ZrO_2$ is one of the most attractive ones combing such favorable properties as a high dielectric constant (k= 20 ~ 25), wide band gap (5 ~ 7 eV) as well as a close thermal expansion coefficient with Si that results in good thermal stability of the $ZrO_2$/Si structure. During the etching process, plasma etching has been widely used to define fine-line patterns, selectively remove materials over topography, planarize surfaces, and trip photoresist. About the high-k materials etching, the relation between the etch characteristics of high-k dielectric materials and plasma properties is required to be studied more to match standard processing procedure with low damaged removal process. Among several etching techniques, we chose the inductively coupled plasma (ICP) for high-density plasma, easy control of ion energy and flux, low ownership and simple structure. And the $BCl_3$ was included in the gas due to the effective extraction of oxygen in the form of $BCl_xO_y$ compounds. During the etching process, the wafer surface temperature is an important parameter, until now, there is less study on temperature parameter. In this study, the etch mechanism of $ZrO_2$ thin film was investigated in function of $Cl_2$ addition to $BCl_3$/Ar gas mixture ratio, RF power and DC-bias power based on substrate temperature increased from $10^{\circ}C$ to $80^{\circ}C$. The variations of relative volume densities for the particles were measured with optical emission spectroscopy (OES). The surface imagination was measured by scanning emission spectroscope (SEM). The chemical state of film was investigated using energy dispersive X-ray (EDX).

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2012.11a
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• pp.123-123
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• 2012

최근 연구되고 있는 TSV(Through Silicon Via) 기술은 Si 웨이퍼 상에 직접 전기적 연결 통로인 관통홀을 형성하는 방법으로 칩간 연결거리를 최소화 할 수 있으며, 부피의 감소, 연결부 단축에 따른 빠른 신호 전달을 가능하게 한다. 이러한 TSV 기술은 최근의 초경량화와 고집적화로 대표되는 전자제품의 요구를 만족시킬 수 있는 차세대 실장법으로 기대를 모으고 있다. 한편, 납땜 재료의 주 원료인 주석은 주로 반도체 소자의 제조, 반도체 칩과 기판의 접합 및 플립 칩 (Flip Chip) 제조시의 범프 형성 등 반도체용 배선재료에 널리 사용되고 있다. 최근에는 납의 유해성 때문에 대부분의 전자제품은 무연솔더를 이용하여 제조되고 있지만, 주석을 이용한 반도체 소자가 고밀도화, 고 용량화 및 미세피치(Fine Pitch)화 되고 있기 때문에, 반도체 칩의 근방에 배치된 주석으로부터 많은 알파 방사선이 방출되어 메모리 셀의 정보를 유실시키는 소프트 에러 (Soft Error)가 발생되는 위험이 많아지고 있다. 이로 인해, 반도체 소자 및 납땜 재료의 주 원료인 주석의 고순도화가 요구되고 있으며, 특히 알파 방사선의 방출이 낮은 로우알파솔더 (Low Alpha Solder)가 요구되고 있다. 이에 따라 본 연구는 4인치 실리콘 웨이퍼상에 직경 $60{\mu}m$, 깊이 $120{\mu}m$의 비아홀을 형성하고, 비아 홀 내에 기능 박막증착 및 전해도금을 이용하여 전도성 물질인 Cu를 충전한 후 직경 $80{\mu}m$의 로우알파 Sn-1.0Ag-0.5Cu 솔더를 접합 한 후, 접합부 신뢰성 평가를 수행을 위해 고속 전단시험을 실시하였다. 비아 홀 내 미세구조와 범프의 형상 및 전단시험 후 파괴모드의 분석은 FE-SEM (Field Emission Scanning Electron Microscope)을 이용하여 관찰하였다. 연구 결과 비아의 입구 막힘이나 보이드(Void)와 같은 결함 없이 Cu를 충전하였으며, 고속전단의 경우는 전단 속도가 증가할수록 취성파괴가 증가하는 경향을 보였다. 본 연구를 통하여 전해도금을 이용한 비아 홀 내 Cu의 고속 충전 및 로우알파 솔더 볼의 범프 형성이 가능하였으며, 이로 인한 전자제품의 소프트에러의 감소가 기대된다.

• Bulletin of the Korean Chemical Society
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• v.32 no.1
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• pp.263-272
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• 2011

Highly luminescent and monodisperse InP quantum dots (QDs) were prepared by a non-organometallic approach in a non-coordinating solvent. Fatty acids with well-defined chain lengths as the ligand, a non coordinating solvent, and a thorough degassing process are all important factors for the formation of high quality InP QDs. By varying the molar concentration of indium to ligand, QDs of different size were prepared and their absorption and emission behaviors studied. By spin-coating a colloidal solution of InP QD onto a silicon wafer, InP QD thin films were obtained. The thickness of the thin films cured at 60 and $200^{\circ}C$ were nearly identical (approximately 860 nm), whereas at $300^{\circ}C$, the thickness of the thin film was found to be 760 nm. Different contrast regions (A, B, C) were observed in the TEM images, which were found to be unreacted precursors, InP QDs, and indium-rich phases, respectively, through EDX analysis. The optical properties of the thin films were measured at three different curing temperatures (60, 200, $300^{\circ}C$), which showed a blue shift with an increase in temperature. It was proposed that this blue shift may be due to a decrease in the core diameter of the InP QD by oxidation, as confirmed by the XPS studies. Oxidation also passivates the QD surface by reducing the amount of P dangling bonds, thereby increasing luminescence intensity. The dielectric properties of the thin films were also investigated by capacitance-voltage (C-V) measurements in a metal-insulator-semiconductor (MIS) device. At 60 and $300^{\circ}C$, negative flat band shifts (${\Delta}V_{fb}$) were observed, which were explained by the presence of P dangling bonds on the InP QD surface. At $300^{\circ}C$, clockwise hysteresis was observed due to trapping and detrapping of positive charges on the thin film, which was explained by proposing the existence of deep energy levels due to the indium-rich phases.

• Journal of Korean Ophthalmic Optics Society
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• v.14 no.1
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• pp.63-68
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• 2009

Purpose: TiN films were deposited on sus304 by unbalanced magnetron sputtering system which was designed and developed as unbalancing the strength of the magnets in the magnetron electrode. The effect of oxygen incorporation in the fabrication of deposited films was investigated. Methods: The cross sections of deposited films on Silicon wafer were observed by SEM to measure the thickness of the films, the components of the surface of the films were identified by XPS survey spectra, the compositional depth-profile of deposited films was examined by an XPS apparatus. Results: From the data of XPS depth profile of films, it could be seen that the element O as well as the elements Ti and N present in the surface of the film and the relative percentage of the element O was constant at 65 at.% with respect to the depth of film. Conclusions: The color change with thickness of the films had something to do with the change of Ti $ 2p_{3/2}$ peak intensity and shape mixed of $ TiO_2$, TiN, $ TiO_{x}N_{y}$ compound.

• Current Photovoltaic Research
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• v.9 no.3
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• pp.75-83
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• 2021

The tunnel oxide passivated contact (TOPCon) structure got more consideration for development of high performance solar cells by the introduction of a tunnel oxide layer between the substrate and poly-Si is best for attaining interface passivation. The quality of passivation of the tunnel oxide layer clearly depends on the bond of SiO in the tunnel oxide layer, which is affected by the subsequent annealing and the tunnel oxide layer was formed in the suboxide region (SiO, Si₂O, Si₂O₃) at the interface with the substrate. In the suboxide region, an oxygen-rich bond is formed as a result of subsequent annealing that also improves the quality of passivation. To control the surface morphology, annealing profile, and acceleration rate, an oxide tunnel junction structure with a passivation characteristic of 700 mV or more (V_oc) on a p-type wafer could achieved. The quality of passivation of samples subjected to RTP annealing at temperatures above 900℃ declined rapidly. To improve the quality of passivation of the tunnel oxide layer, the physical properties and thermal stability of the thin layer must be considered. TOPCon silicon solar cell has a boron diffused front emitter, a tunnel-SiO_x/n⁺-poly-Si/SiN_x:H structure at the rear side, and screen-printed electrodes on both sides. The saturation currents J_o of this structure on polished surface is 1.3 fA/cm² and for textured silicon surfaces is 3.7 fA/cm² before printing the silver contacts. After printing the Ag contacts, the J_o of this structure increases to 50.7 fA/cm² on textured silicon surfaces, which is still manageably less for metal contacts. This structure was applied to TOPCon solar cells, resulting in a median efficiency of 23.91%, and a highest efficiency of 24.58%, independently. The conversion efficiency of interdigitated back-contact solar cells has reached up to 26% by enhancing the optoelectrical properties for both-sides-contacted of the cells.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.20 no.6
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• pp.80-85
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• 2019

Vanadium dioxide is a well-known metal-insulator phase transition material. Lots of researches of vanadium redox flow batteries have been researched as large scale energy storage system. In this study, vanadium oxide($VO_x$) thin films were applied to cathode for lithium ion battery. The $VO_x$ thin films were deposited on Si substrate($SiO_2$ layer of 300 nm thickness was formed on Si wafer via thermal oxidation process), quartz substrate by RF magnetron sputter system for 60 minutes at $500^{\circ}C$ with different RF powers. The surface morphology of as-deposited $VO_x$ thin films was characterized by field-emission scanning electron microscopy. The crystallographic property was confirmed by Raman spectroscopy. The optical properties were characterized by UV-visible spectrophotometer. The coin cell lithium-ion battery of CR2032 was fabricated with cathode material of $VO_x$ thin films on Cu foil. Electrochemical property of the coin cell was investigated by electrochemical analyzer. As the results, as increased of RF power, grain size of as-deposited $VO_x$ thin films was increased. As-deposited thin films exhibit $VO_2$ phase with RF power of 200 W above. The transmittance of as-deposited $VO_x$ films exhibits different values for different crystalline phase. The cyclic performance of $VO_x$ films exhibits higher values for large surface area and mixed crystalline phase.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.35 no.6
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• pp.603-609
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• 2022

Passivation quality is mainly governed by epitaxial growth of crystalline silicon wafer surface. Void-rich intrinsic a-Si:H interfacial layer could offer higher resistivity of the c-Si surface and hence a better device efficiency as well. To reduce the resistivity of the contact area, a modification of void-rich intrinsic layer of a-Si:H towards more ordered state with a higher density is adopted by adapting its thickness and reducing its series resistance significantly, but it slightly decreases passivation quality. Higher resistance is not dominated by asymmetric effects like different band offsets for electrons or holes. In this study, multilayer of intrinsic a-Si:H layers were used. The first one with a void-rich was a-Si:H(I₁) and the next one a-SiO_x:H(I₂) were used, where a-SiO_x:H(I₂) had relatively larger band gap of ~2.07 eV than that of a-Si:H (I₁). Using a-SiO_x:H as I₂ layer was expected to increase transparency, which could lead to an easy carrier transport. Also, higher implied voltage than the conventional structure was expected. This means that the a-SiO_x:H could be a promising material for a high-quality passivation of c-Si. In addition, the i-a-SiO_x:H microstructure can help the carrier transportation through tunneling and thermal emission.