• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2017.05a
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• pp.161.2-161.2
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• 2017

희토류계 영구자석은 대부분의 전기, 전자 제품의 핵심부품이며 높은 보자력, $BH_{max}$를 가지고 있어 자기기록저장매체, MEMS(엑츄에이터), 소형센서, 소형모터 등의 응용 분야에 적용시키기 위해 다양한 연구들이 진행되고 있다. 그러나 영구자석에 들어가는 희토류계 원소의 수급의 어려움 및 가격의 문제점으로 친환경 자석으로의 전환 및 희토류나 중희토류를 사용하지 않는 비희토류계 영구자석을 제조 및 개발하는데 많은 연구가 이루어지고 있다. 이 중 Fe-N 계 자성물질인 $Fe_{16}N_2$는 포화 자화 값이 현재까지의 비희토류계 자성물질 중 가장 높은 값(240emu/g)을 나타내며 상대적으로 높은 결정자기이방성 상수를 가지고 있어 비희토류계 영구자석 물질 중 하나로 주목받으며 연구되어지고 있다. 본 연구에서는 $Fe_{16}N_2$ 박막을 얻기 위해 DC Magnetron Sputtering 방법을 이용하여 Si wafer 위에 박막을 증착하고 증착시간에 따라 두께를 제어하여 제조한 후 박막의 미세구조, 상 분석, 자성 특성을 관찰을 통해 최적의 공정 조건을 찾고자 하였다. 증착 시간에 따른 박막의 성장 속도는 일정하게 증가하였으며, 증착 시간의 증가에 따라 박막 내 $Fe_{16}N_2$의 상대적인 분율은 감소하였다. 모든 공정 조건에서 $Fe_3N$, $Fe_4N$, $Fe_{16}N_2$ 상들이 섞여 성장하였으며 XRD를 통한 상분석과 더불어 VSM을 통한 자성 특성을 분석해본 결과 $Fe_{16}N_2$의 분율을 가장 높게 성장된 공정 조건은 증착 시간이 10분이며 박막의 두께가 ${\sim}1{\mu}m$ 일 때, 최적의 조건을 얻을 수 있었으며, 이 때의 자성 특성을 분석한 결과 ~2.45T의 포화 자화 값과 ~1.41T의 잔류 자화 값을 얻을 수 있었다.

• Journal of Microbiology and Biotechnology
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• v.27 no.11
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• pp.2037-2043
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• 2017

The surface protein hemagglutinin (HA) mediates the attachment of influenza virus to host cells containing sialic acid and thus facilitates viral infection. Therefore, HA is considered as a good target for the development of diagnostic tools for influenza virus. Previously, we reported the isolation of single-stranded aptamers that can distinguish influenza subtype H1 from H5. In this study, we describe a method for the selective electrical detection of H1 using the isolated aptamer as a molecular probe. After immobilization of the aptamer on Si wafer, enzyme-linked immunosorbent assay (ELISA) and field emission scanning electron microscopy (FE-SEM) showed that the immobilized aptamer bound specifically to the H1 subtype but not to the H5 subtype. Assessment by cyclic voltammetry (CV) also demonstrated that the immobilized aptamer on the indium thin oxide-coated surface was specifically bound to the H1 subtype only, which was consistent with the ELISA and FE-SEM results. Further measurement of CV using various amounts of H1 subtype provided the detection limit of the immobilized aptamer, which showed that a nanomolar scale of target protein was sufficient to produce the signal. These results indicated that the selected aptamer can be an effective probe for distinguishing the subtypes of influenza viruses by monitoring current changes.

• Journal of Surface Science and Engineering
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• v.43 no.5
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• pp.238-242
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• 2010

In the present work, the influence of oxide on the Cr-Si-N coatings was investigated for the Cr-Si-O-N coatings on AISI 304 and Si wafer deposited by hybrid system, which combines the DC magnetron sputtering technique and arc ion plating (AIP) using Cr and Si target in an $Ar/N_2/O_2$ gaseous mixture. As the O content in the Cr-Si-N coatings increased, the diffraction patterns of the Cr-Si-O-N coatings showed CrN and $Cr_2O_3$ phases. However, as the O content increased to 28.8 at.%, diffraction peak of $Cr_2O_3$ was disappeared in the Cr-Si-O-N coating. The $d_{200}$ value was decreased with increasing of O content. The average grain size increased from about 40 nm to 65 nm as the O content increased. The maximum micro-hardness of the Cr-Si-O-N coating was obtained 4507 Hk at the O content of 24.8 at.%. The average friction coefficient of the Cr-Si-O-N coatings was gradually decreased by increasing the O content and the average friction coefficient decreased from 0.37 to 0.25 by increasing the O content. These results indicated that amorphous phase was increased in the Cr-Si-O-N coatings by increasing of O content.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2018.06a
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• pp.77-77
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• 2018

Panel level packaging (PLP) 공정은 차세대 반도체 패키징 기술로써 wafer level packaging 대비 net die 면적이 넓어 생산 단가 절감에 유리하다. PLP 공정에 적용되는 구리 재배선 층 (RDL, redistribution layer)은 두께 불균일도에 의해 전기 저항의 유동이 민감하게 변화하기 때문에 RDL의 두께를 균일하게 형성하는 것은 신뢰성 측면에서 매우 중요하다. 구리 RDL은 주로 도금 공정을 통해 형성되며, 균일한 도금막 형성을 위해 도금조에 평탄제를 첨가하여 도금 속도를 균일하게 한다. 도금막에 대한 흡착은 주로 평탄제의 imine 작용기에 포함된 질소 원자가 관여하며, imine 작용기의 4차화에 의한 평탄제의 흡착 정도를 제어하여 평탄제 성능을 개선할 수 있다. 본 연구에서는 도금 평탄제에 포함된 imine 작용기의 질소 원자를 4차화하여 구리 RDL의 도금 두께 불균일도를 제어하고자 하였다. 유기첨가제와 4차화 반응을 위해 알킬화제로써 dimethyl sulfate의 비율을 조절하여 각각 0, 50, 100 %로 4차화 반응을 진행하였다. 평탄제의 4차화 여부를 확인하기 위해 gel permeation chromatography (GPC) 분석을 실시하였다. 도금은 20 ~ 200 um의 다양한 배선 폭을 갖는 구리 RDL 미세패턴에서 진행하였으며, 4차화 평탄제를 첨가하여 광학 현미경과 공초점 레이저 현미경을 통해 도금막 표면과 두께에 대한 분석을 실시하였다. GPC 분석을 통해 4차화 반응 후 알킬화제에 의해 나타나는 GPC peak이 감소한 것을 확인하였다. 광학 현미경 및 공초점 레이저 현미경 분석 결과, 4차화된 질소 원자가 존재하지 않는 평탄제의 경우, 도금 시 도금막의 두께가 불균일하였으며 단면 분석 시 dome 형태가 관찰되었다. 또한 100 % 4차화를 실시한 평탄제를 첨가하여 도금 한 경우 마찬가지로 두께가 불균일한 dish 형태의 도금막이 형성되었다. 반면, 50 % 4차화를 적용한 평탄제를 첨가한 경우, 도금막 단면의 형태는 평평한 모습을 보였으며 매우 양호한 균일도를 가지는 것으로 확인되었다. 이로 인해 imine 작용기를 포함한 평탄제의 4차화 반응을 통해 구리 RDL의 단면 형상 및 불균일도가 제어되는 것을 확인하였으며, 4차화된 imine 작용기의 비율을 조절하여 높은 균일도를 갖는 구리 RDL 도금이 가능한 것으로 판단되었다.

• Journal of Surface Science and Engineering
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• v.36 no.5
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• pp.373-378
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• 2003

With increasing environmental concerns, application of lead-free solder and fluxless soldering process have been taken attention from the electronic packaging industry. Plasma treatment is one of the soldering methods for the fluxless soldering, and it can prevent environmental pollution cased by flux. On this study fluxless soldering process under $Ar-H_2$plasma using lead free solders such as Sn-3.5 wt%Ag, Sn-3.5 wt%Ag-0.7 wt%Cu and Sn-37%Pb for a reference was investigated. As the plasma reflow has higher soldering temperature than normal air reflow, the effects of UBM(Under Bump Metallization) thickness on the interfacial reaction and bonding strength can be critical. Experimental results showed in case of the thin UBM, Au(20 nm)/Cu(0.3 $\mu\textrm{m}$)/Ni(0.4 $\mu\textrm{m}$)/Al(0.4 $\mu\textrm{m}$), shear strength of the soldered joint was relatively low as 19-27㎫, and it's caused by the crack observed along the bonded interface. The crack was believed to be produced by the exhaustion of the thin UBM-layer due to the excessive reaction with solder under plasma. However, in case of thick UBM, Au(20 nm)/Cu(4 $\mu\textrm{m}$)/Ni(4 $\mu\textrm{m}$)/Al(0.4 $\mu\textrm{m}$), the bonded interface was sound without any crack and shear strength gives 32∼42㎫. Thus, by increasing UBM thickness in this study the shear strength can be improved to 50∼70%. Fluxed reflow soldering under hot air was also carried out for a reference, and the shear strength was 48∼52㎫. Consequently the fluxless soldering with plasma showed around 65∼80% as those of fluxed air reflow, and the possibility of the $Ar-H_2$ plasma reflow was evaluated.

• Journal of Surface Science and Engineering
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• v.44 no.2
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• pp.60-67
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• 2011

Ternary B-C-N coatings were deposited on Si(100) wafer substrate from $B_4C$ target by RF magnetron sputtering technique in $Ar+N_2+CH_4$ gas mixture. In this work, the effect of reactant gas ratio, $CH_4/(N_2+CH_4)$ on the composition, kinds and amounts of bonding states comprising B-C-N coatings were investigated using two different bias power sources of continuous and unipolar DCs. In addition, the tribological properties of coatings were studied with the composition and bonding state of coating. It was found that the substrate bias power had an effect on chemical composition, and all of the obtained coatings were nearly amorphous. Main bonding states of coatings were revealed from FTIR analyses to be h-BN, C-C, C-N, and B-C. The amount of C-C bonging mainly increased with increase of the reactant gas ratio. From our studies, both C-C and h-BN bonding states improved the tribological properties but B-C one was found to be harmful on those. The best coating from tribological points of view was found to be $BC_{1.9}N_{2.3}$ composition.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.8
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• pp.80-90
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• 1994

The ultra shallow junction was formed by 2-step RTP. Phosphorus solid source(P$_{2}O_{5}$) was transfered on wafer surface during RTG(Rapid Thermal Glass Transfer) of which process condition was 80$0^{\circ}C$ and 60sec. The process temperature and time of the RTD(Rapid Thermal Diffusion) were 950~105$0^{\circ}C$ during 5~15sec respectively sheet resistances were measured as 175~320$\Omega$/m and junction depth and dopth and dopant surface concentration were measured as 0.075~0.18$\mu$m and 5${\times}10^{19}cm^{4}$ respectively. Ti-silicide was formed by 2-step RTA after 300$\AA$ Titanium was deposited. The 1st RTA (2nd RTA) was carried out at the temperature of $600^{\circ}C$(700~80$0^{\circ}C$) for 30 seconds (10~60 seconds) under N$_2$ ambient. Sheet resistances after 2nd RTA were measured as 46~63$\Omega$/D. Si/Ti component ratio was evaulated as 1.6~1.9 from Auger depth profile. Ti-Silicided n-p junction diode (pattern size : 400$\times$400$\mu$m) was fabricated under the RTD(the process was carried out at the temperature of 100$0^{\circ}C$ for 10seconds) and 2nd RTA(theprocess was carried out at the temperature of 750$^{\circ}C$ for 60 seconds). Leakage current was measured 1.8${\times}10^{7}A/mm^{2}$ at 5V reverse voltage. Whent the RTD process condition is at the temperature of 100$0^{\circ}C$ for 10seconds and the 2nd RTA process condition is at the temperature of 75$0^{\circ}C$ for 60 seconds leakage current was 29.15${\times}10^{9}A$(at 5V).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.523-524
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• 2007

This paper discusses the planarization process of thick copper film structure used for power supply device. Chemical mechanical polishing(CMP) has been used to remove a metal film and obtain a surface planarization which is essential for the semiconductor devices. For the thick metal removal, however, the long process time and other problems such as dishing, delamination and metal layer peeling are being issued, Compared to the traditional CMP process, Electro-chemical mechanical planarization(ECMP) is suggested to solve these problems. The two-step process composed of the ECMP and the conventional CMP is used for this experiment. The first step is the removal of several tens ${\mu}m$ of bulk copper on patterned wafer with ECMP process. The second step is the removal of residual copper layer aimed at a surface planarization. For more objective comparison, the traditional CMP was also performed. As an experimental result, total process time and process defects are extremely reduced by the two-step process.

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.80-80
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• 2000

Surface acoustic wave (SAW) devices have become more important as mobile telecommunication systems need h호-frrequency, low-loss, and down-sized components. Higher-frequency SAW divices can be more sasily realized by developing new h호-SAW-velocity materials. The ZnO/diamond/Si multilasyer structure is one of the most promising material components for GHz-band SAW filters because of its SAW velocity above 10,000 m/sec. Silicon carbide is also a potential candidate material for high frequency, high power and radiation resistive electronic devices due to its superior mechanical, thermal and electronic properties. However, high price of commercialized 6- or 4H-SiC single crystalline wafer is an obstacle to apply SiC to high frequency SAW devices. In this study, single crystalline 3C-SiC thin films were grown on Si (100) by MOCVD using bis-trimethylsilymethane (BTMSM, C7H20Si7) organosilicon precursor. The 3C-SiC film properties were investigated using SEM, TEM, and high resolution XRD. The FWHM of 3C-SiC (200) peak was obtained 0.37 degree. To investigate the SAW propagation characteristics of the 3C-SiC films, SAW filters were fabricated using interdigital transducer electrodes on the top of ZnO/3C-SiC/Si(100), which were used to excite surface acoustic waves. SAW velocities were calculated from the frequency-response measurements of SAW filters. A generalized SAW mode. The hard 3C-SiC thin films stiffened Si substrate so that the velocities of fundamental and the 1st mode increased up to 5,100 m/s and 9,140 m/s, respectively.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2012.05a
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• pp.150-150
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• 2012

본 연구는 1차원 나노 구조의 합성과 기초적 분석에 관한 연구로써 특히 무기 산화물 나노재료를 그 대상으로 하였다. 내용으로는 첫째, 1차원 코어 나노와이어의 합성을 하였고 Thermal evaporation, substrate의 가열, 그리고 MOCVD 를 사용한 결과들을 나열한다. 둘째, 코어-쉘 나노와이어를 제작하기 위하여 특히 쉘층의 제작방법을 연구하였는데 PECVD, ALD, 그리고 sputtering에 의한 결과들을 나열하고 간단히 설명한다. Thermal evaporation에 의한 1차원 나노와이어 합성의 경우는 MgO의 예를 들었는데 MgO 나노와이어는 Au가 증착된 기판을 열처리하여 Au dot를 형성하고 이의 morphology를 조절하여 최적의 나노와이어 합성조건을 선정하였다. 이로써 기판 morphology가 나노선의 성장및 형상에 영향을 준다는 사실을 알게 되었다. 이 사실은 In2O3기판을 사용하고 이의 표면거칠기를 열처리로 조절하므로써 역시 나노와이어의 성장을 촉진하는 방법을 찾아내었다. 또한 thermal evaporation공법은 source분말의 선택에 따라 다양한 소재를 제작가능하다는 결과를 제시하였다. 예를 들면 SiOx 층이 precoating된 chamber내에서 MgO 나노선을 합성하는 것과 동일한 조건으로 실험을 진행하면 Mg2SiO4 나노와이어가 형성된 것을 확인하였다. 또한 Sn과 MgB2 분말을 함께 적용할 경우 Sn tip을 가진 MgO 나노와이어를 얻을 수 있었다. 이는 Sn이 동시에 촉매의 역할을 하였기 때문일 것으로 추정된다. 한편 Sn과 Bi 혼합분말을 적용한 경우 Bi2Sn2O7 신소재 tip을 포함한 SnO2 나노와이어를 얻을 수 있었다. 이 경우 Bi원자가 적절한 촉매의 역할을 수행한 것으로 사료된다. Substrate의 가열공법에서는 Si wafer상에 각종 금속 즉 Au, Ag, Cu, Co, Mo, W, Pt, Pd등 초박막을 DC sputter 로 형성한후 annealing하는 기술을 사용하였다. 특기할 만한 것은 Co를 사용한 경우 나노와이어의 spring구조를 얻을 수 있었다는 점이다. MOCVD에 의하여는 Ga2O3및 Bi2O3 나노와이어를 비교적 저온에서 합성하였고 In2O3의 경우는 독특한 나노구조를 형성하였고 이의 결정학적 특성에 대하여 조사하였다.