• Journal of the Semiconductor & Display Technology
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• v.22 no.4
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• pp.7-12
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• 2023

The edge ring placed on the outside of the electrostatic chuck (ESC) is a key component for protecting the ESC and controlling the etching uniformity of the edge of the wafer. Therefore, it is very important to understand the etching phenomenon of edge rings for edge ring management and equipment homeostasis. In this study, a specimen with SiO₂ hard mask and underlying Si mold was installed on the edge ring surface and the etching results were measured by varying the edge ring 2MHz RF power. By developing PI-VM model with high prediction accuracy and analyzing the roles of key parameters in the model, we were able to evaluate the effect of plasma and sheath characteristics around the edge ring on edge ring erosion. This analysis method provided information necessary for edge ring maintenance and operation.

• Journal of the Microelectronics and Packaging Society
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• v.11 no.4 s.33
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• pp.81-86
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• 2004

A new method to improve the wet etching characteristics is described. The anisotropic wet-etching of (100) Si with megasonic wave has been studied in KOH solution. Etching characteristics of p-type (100) 6 inch Si have been explored with and without megasonic irradiation. It has been observed that megasonic irradiation improves the characteristics of wet etching such as an etch uniformity and surface roughness. The etching uniformity on the whole wafer with and without megasonic irradiation were less than ${\pm}1\%$ and more than $20\%$, respectively. The initial root-mean-square roughness($R_{rms}$) of single crystal silicon is 0.23 nm. It has been reported that the roughnesses with magnetic stirring and ultrasonic agitation were 566 nm and 66 nm, respectively. Comparing with the results, etching with megasonic irradiation achieved the Rrms of 1.7 nm on the surface after the $37{\mu}m$ of etching depth. Wet etching of silicon with megasonic irradiation can maintain nearly the original surface roughness after etching process. The results have verified that the megasonic irradiation is an effective way to improve the etching characteristics such as etch uniformity and surface roughness.

• Journal of the Microelectronics and Packaging Society
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• v.13 no.3 s.40
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• pp.47-51
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• 2006

Recently, CMP (Chemical Mechanical Polishing) is one of very important processing in semiconductor technology because of large integration and application of design role. CMP is a planarization process of wafer surface using the chemical and mechanical reactions. One of the most important components of the CMP system is the polishing pad. During the CMP process, the pad itself becomes smoother and glazing. Therefore it is necessary to have a pad conditioning process to refresh the pad surface, to remove slurry debris and to supply the fresh slurry on the surface. A conditioning disk is used during the pad conditioning. There are diamonds on the surface of diamond disk to remove slurry debris and to polish pad surface slightly, so density, shape and size of diamond are very important factors. In this study, we characterized diamond disk with 9 kinds of sample.

• 한국신재생에너지학회:학술대회논문집
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• 2010.06a
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• pp.91.1-91.1
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• 2010

There are some methods for increasing efficiency of crystalline silicon solar cells. Among them, It is important to reduce the recombination loss of surface for high efficiency. In order to reduce recombination loss is a way to use the BSF(Back Surface Field). The BSF on the back of the p-type wafer forms a p+layer. so, it is prevented to act electrons of the p-area for the rear recombination. As a result, the leakage current is reduced and the rear-contact has a good Ohmic contact. therefore, open-circuit-voltage and Fill factor(FF) of solar cells are increased. This paper investigates the formation of rear contact process comparing Aluminum-paste(Al-paste) with Aluminum-Metal(99.9%). It is shown that the Aluminum-Metal provides high conductivity and low contact resistance of $21.35m{\Omega}cm$ using the Vacuum evaporation process but, it is difficult to apply the standard industrial process because high Vacuum is needed and it costs a tremendous amount more than Al-paste. On the other hand, using the Al-paste process by screen printing is simple for formation of metal contact and it is possible to produce the standard industrial process. however, it is lower than Aluminum-Metal(99.9) of conductivity because of including mass glass frit. In this study, contact resistances were measured by 4-point prove. each of contact resistances is $21.35m{\Omega}cm$ of Aluminum-Metal and $0.69m{\Omega}cm$ of Al-paste. and then rear contact have been analyzed by Scanning Electron Microscopy(SEM).

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.2
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• pp.89-95
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• 1995

The structure of boron ion-implanted pn junctio in the vacancy-doped p-type HgCdTe was investigated with the differential Hall measurement. The as-implanted junction showed the electron concentration as high as 1${\times}10^{18}/cm^{3}$ and the junction depth of 0.6.mu.m. When the HgCdTe junction was heated in oven, the electron concentration near the junction decreased and the junction depth increased as the annealing temperature and time increased. The junction structure after the thermal annealing was n$^{+}$/n$^{-}$/p. For the 200.deg. C 20min annealed sample, the electron mobility was 10$^{4}cm^{2}/V{\cdot}$s near the surface(n$^{+}$), and was larger thatn 10$^{5}cm^{2}/V{\cdot}$s near the junction(n$^{+}$). The junction formation mechanism is conjectured as follows. When HgCdTe is ion-implanted, the ion energy generates crystal defecis and displaced Hg atoms HgCdTe is ion-implanted, the ion energy generates crystal defecis and displaced Hg atoms near the surface. The displaced Hg vacancies diffuse in easily by the thernal treatment and a fill the Hg vacancies in the p-HgCdTe substrate. With the Hg vacancies filled completely, the GfCdTe substrate becomes n-type because of the residual n-type impurity which was added during the wafer growing. Therefore, the n$^{+}$/n$^{-}$/p regions are formed by crystal defects, residual impurities, and Hg vacancies, respectively.

• Journal of the Korean Institute of Telematics and Electronics
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• v.13 no.2
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• pp.23-27
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• 1976

$Si{\cdot}SnO_{2}$ heterojunction was prepared by oxidzing at oxygen atmosphere $SnO_{2-X}$ Which made by Flith evaporation of $SnO_{2}$ powder on III surface of p and n type Si single crystals. The energy band Profile of $Si{\cdot}SnO_{2}$ heterojunction was depicted from its physical properties. This heterojunction was very good rectifying junction, very sensitive in spectral response of Photovoltage at from 400nm to 1200nm, and -10$^{18}$sec of time contant. From above properties, this heterojunction was found ps good high speed photovoltaic device and solar cell.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.140-140
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• 2009

The Metal-ferroelectric-semiconductor (MFS) structure has superior advantages such as high density integration and non-destructive read-out operation. However, to obtain the desired electrical characteristics of an MFS structure is difficult because of interfacial reactions between ferroelectric thin film and Si substrate. As an alternative solution, the MFS structure with buffer insulating layer, i.e. metal-ferroelectric-insulator-semiconductor (MFIS), has been proposed to improve the interfacial properties. Insulators investigated as a buffer insulator in a MFIS structure, include $Ta_2O_5$, $HfO_2$, and $ZrO_2$ which are mainly high-k dielectrics. In this study, we prepared the Dy-doped $La_2O_3$ solution buffer layer as an insulator. To form a Dy-doped $La_2O_3$ buffer layer, the solution was spin-coated on p-type Si(100) wafer. The coated Dy-doped $La_2O_3$ films were annealed at various temperatures by rapid thermal annealing (RTA). To evaluate electrical properties, Au electrodes were thermally evaporated onto the surface of the samples. Finally, we observed the surface morphology and crystallization quality of the Dy-doped $La_2O_3$ on Si using atomic force microscopy (AFM) and x-ray diffractometer (XRD), respectively. To evaluate electrical properties, the capacitance-voltage (C-V) and current density-voltage (J-V) characteristics of Au/Dy-doped La2O3/Si structure were measured.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.3
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• pp.59-65
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• 1999

In this paper, we had studied the possibility of application as Cu thin films from (hfac)Cu(VTMOS) which is very stable. Cu thin films had been studied as a function of deposition temperature. Substrates used in the experiment were PVD TiN on Si wafer. Deposition conditions were as follow : deposition temperature $50^{\circ}C$. Cu thin films were analyzed by AES, four point probe, XRD and SEM. All of deposited films were very pure and some favoring of <111> planes perpendicular to the substrate surface were observed. Cu thin films had two distinct growth rates at various deposition temperature. One is the surface reaction limited region below $200^{\circ}C$, and the other is the mass transport limited region above $200^{\circ}C$. The resistivity of deposited Cu thin films under the optimum deposition condition is $2.5mu\Omega.cm$ Thus, properties of deposited Cu thin films using (hfac)Cu(VTMOS) didn't show difference with Cu thin films from other precursors.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.37 no.4
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• pp.467-473
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• 2013

In this study, two-dimensional finite element models were developed and experiments were conducted using an atomic force microscope to investigate the tribological characteristics of an SU-8 layer coated on a patterned wafer for microsystem applications. The results revealed that both the adhesion and the friction forces measured by the atomic force microscope were lower for the SU-8 coated surface than for the bare silicon surface. This is attributed to the hydrophobicity of SU-8. Another important result derived from the finite element analysis was the critical load required to fracture the SU-8 film with respect to the thickness. The critical loads for thicknesses of 200, 400, and 800 nm were approximately 13, 22, and 28 mN, respectively, which corresponded to a Hertzian contact pressure of 1.2-1.8 GPa. These results will aid in the design of a suitable SU-8 thickness for microsystem components that are in contact with one another.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2016.11a
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• pp.179-179
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• 2016

희토류계 영구자석은 높은 보자력과 잔류 자화을 가지고 있어 자기기록저장매체, MEMS(엑츄에이터), 센서 등의 응용 분야에 적용시키기 위해 다양한 연구들이 진행되고 있다. 하지만 희토류계 원소의 수급 및 가격의 문제점으로 친환경자석으로의 전환 및 희토류나 중희토류를 사용하지 않는 비희토류계 영구자석을 개발하는 연구에 대한 필요성이 대두되고 있다. 이 중 Fe-N 계 자성 물질인 $Fe_{16}N_2$는 포화 자화 값이 현재까지의 자성물질 중 가장 높은 값(240emu/g)을 나타내며 상대적으로 높은 결정자기이방성 상수를 가지고 있어 비희토류계 영구자석 물질 중 하나로 주목받고 있다. 본 연구에서는 $Fe_{16}N_2$ 박막을 얻기 위해 DC Magnetron Sputtering 방법을 이용하여 Si wafer 위에 박막을 증착하고 증착공정 조건 중 질소 유량 및 Sputtering Power를 변수로 따른 박막의 성장, 조직변화, 자성 특성을 관찰을 통해 최적의 공정 조건을 찾고자 하였다. $N_2$ 가스 유량 변화에 따른 박막의 성장 속도는 거의 변화가 없었으며 $N_2$ 가스 유량의 증가에 따라 박막 내 Fe의 함유량은 감소하였다. 모든 공정 조건에서 $Fe_3N$, $Fe_4N$, $Fe_{16}N_2$ 상들이 섞여 성장하였으며 XRD를 통한 상분석과 더불어 VSM을 통한 자성 특성을 분석해본 결과 $Fe_{16}N_2$의 분율이 가장 높게 성장된 공정 조건은 Power는 200W, $N_2$ 가스 유량은 20sccm이었으며 이 조건에서 2.45T의 포화 자화 값과 1.4T의 잔류 자화 값을 얻을 수 있었다.