• The Transactions of the Korean Institute of Electrical Engineers C
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• v.55 no.6
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• pp.291-296
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• 2006

In this study, the sputtered BTO film was polished by CMP process with the self-developed $BaTiO_3$- and $TiO_2$-mixed abrasives slurries (MAS), respectively. The removal rate of BTO ($BaTiO_3$) thin film using the $BaTiO_3$-mixed abrasive slurry (BTO-MAS) was higher than that using the $TiO_2$-mixed abrasives slurry ($TiO_2$-MAS) in the same concentrations. The maximum removal rate of BTO thin film was 848 nm/min with an addition of $BaTiO_3$ abrasive at the concentration of 3 wt%. The sufficient within-wafer non-uniformity (WIWNU%) below 5% was obtained in each abrsive at all concentrations. The surface morphology of polished BTO thin film was investigated by atomic force microscopy (AFM).

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.52 no.10
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• pp.447-450
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• 2003

This paper presents a process optimization of antireflection (AR) coating on crystalline Si solar cells. Theoretical and experimental investigations were performed on a double-layer AR (DLAR) coating of MgF$_2$/CeO$_2$. We investigated CeO$_2$ films as an AR layer because they have a proper refractive index of 2.46 and demonstrate the same lattice constant as Si substrate. RF sputter grown CeO$_2$ film showed strong dependence on a deposition temperature. The CeO$_2$ deposited at 40$0^{\circ}C$ exhibited a strong (111) preferred orientation and the lowest surface roughness of 6.87 $\AA$. Refractive index of MgF$_2$ film was measured as 1.386 for the most of growth temperature. An optimized DLAR coating showed a reflectance as low as 2.04% in the wavelengths ranged from 0.4${\mu}{\textrm}{m}$ to 1.1${\mu}{\textrm}{m}$. We achieved the efficiencies of solar cells greater than 15% with 3.12% improvement with DLAR coatings. Further details on MgF$_2$, CeO$_2$ films, and cell fabrication parameters are presented in this paper.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.11a
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• pp.452-455
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• 2002

Single crystal 3C-SiC(cubic silicon carbide) thin-films were deposited on Si(100) substrate up to a thickness of $4.3{\mu}m$ by APCVD method using HMDS(hexamethyildisilane) at $1350^{\circ}C$. The HMDS flow rate was 0.5 sccm and the carrier gas flow rate was 2.5 slm. The HMDS flow rate was important to get a mirror-like crystal surface. The growth rate of the 3C-SiC films was $4.3{\mu}m/hr$. The 3C-SiC epitaxical films grown on Si(100) were characterized by XRD, AFM, RHEED, XPS and raman scattering, respectively. The 3C-SiC distinct phonons of TO(transverse optical) near $796cm^{-1}$ and LO(longitudinal optical) near $974{\pm}1cm^{-1}$ were recorded by raman scattering measurement. The heteroepitaxially grown films were identified as the single crystal 3C-SiC phase by XRD spectra$(2{\theta}=41.5^{\circ})$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.11a
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• pp.39-42
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• 2002

Recently, CMP (chemical mechanical polishing) technology has been widely used for global planarization of multi-level interconnection for ULSI applications. However, COO (cost of ownership) and COC (cost of consumables) were relatively increased because of expensive slurry. In this paper, we have studied the possibility of recycle of reused silica slurry in order to reduce the costs of CMP slurry. The post-CMP thickness and within-wafer non-uniformity(WIWNU) were measured as a function of different slurry composition. As a experimental result, the performance of reused slurry with annealed silica abrasive of 2 wt% contents was showed high removal rate and low non-uniformity. Therefore, we propose two-step CMP process as follows In the first-step CMP, we can polish the thick and rough film surface using remaked slurry, and then, in the second-step CMP, we can polish the thin film and fine pattern using original slurry. In summary, we can expect the saving of high costs of slurry.

• Journal of the Semiconductor & Display Technology
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• v.4 no.3 s.12
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• pp.29-33
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• 2005

As the integrated devices become more and more sophistcated, the diameter of wafers increased up to 300 mm and strict level of cleaning is necessary to remove the particulates on the surface of wafer. Therefore we need a new type of wet-station which can reduce DI water and chemical in the cleaning process. Moreover, it is important to control the temperature and the concentration of chemical in the wet-station. In the conventional chemical supply system, it is difficult not only to fit the mixing rate of chemicals in cleaning process, but also to fit the quantity and temperature. Thus, we propose a new chemicals supply system, which overcomes above problems by the analysis of fluid and thermal transfer on chemical supply system.

• Solar Energy
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• v.15 no.3
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• pp.141-149
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• 1995

The tungsten oxide thin films were prepared on $s_i$ wafer by using an electron-beam evaporation technique. Thickness and structure of tungsten oxide film degraded in various electrolytes were analyzed by Rutherford backscattering spectroscopy, Raman spectroscopy, X-ray photoelectron spectroscopy and scanning electron microscope. Thickness of $WO_3$ film was the most dissolved in 1M $H_2SO_4$ electrolytye. We have confirmed that the degradation of this films was accelerated by $H_2O$ in electrolytes. But the electronic structure of film degraded by electrolyte contained of glycerol was not changed as comparision with as-deposited film. The degradation may be attributed to a change of thickness and the surface morphology of the film.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.292-292
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• 2013

최근, 자연의 기능성 표면을 모사하여 우리 생활에 응용하기 위한 연구가 활발하다. 초-발수 특성을 가지는 대표적인 예인 연꽃잎은 마이크로-나노 크기의 거친 미세돌기(papillae)를 가지고 있으며 그 위에 낮은 표면 에너지를 가지는 왁스(wax)가 발달 되어 항상 깨끗한 상태를 유지한다. 본 실험에서는 이를 모사하여 RIE (Reactive Ion Etching)방법을 이용하여 기판인 Poly silicon wafer를 Sf6가스를 사용하여 Metal mash로 거칠기를 만들어 주었고, RF-magnetron sputtering 장치를 사용하여 $6{\times}10^{-3}$ Torr의 진공도에서 낮은 표면에너지를 가지는 PTFE (polytetrafluoroethylene)를 증착하여 표면 구조와 발수특성에 대하여 조사하였다. SSME(Surface shape measurement equipment)측정결과 0.24~0.36 um RSa 값이 측정되었고, 12 uL의 Di-water로 접촉각을 측정 한 결과 RIE 10분 처리를 한 기판 위에 PTFE를 3분 증착하였을 때 가장 높은 $153^{\circ}$의 초-발수 특성이 나타났으며, 4주의 시간이 지났을 때에도 접촉각이 유지가 되었다. XPS 측정결과 초-발수 표면에서 나타나는 CF2와 CF3 피크 값이 측정되었다. Reactive Ion Etching을 이용한 PTFE 발수 특성은 방수, 스마트 윈도우, 자가세정(Self-Cleaning), 디스플레이 표시장치, 김서림 방지(Anti-Fogging), 대전방지 코팅 등에 다각적으로 응용 가능할 것이라 사료된다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.112-112
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• 2008

최근 Ruthenium (Ru) 은 높은 화학적 안정성, 누설전류에 대한 높은 저항성, 저유전체와의 높은 안정성 등과 같은 특성으로 인해 금속층-유전막-금속층 캐패시터의 하부전극으로 각광받고 있다. 또한 Cu와의 우수한 Adhesion 특성으로 인해 Cu 배선에서의 Cu 확산 방지막으로도 주목받고 있다. 그러나 이렇게 형성된 Ru 하부전극의 각 캐패시터간의 분리와 평탄화를 위해서는 CMP 공정이 도입이 필요하다. 이러한 CMP 공정에 공급되는 Slurry 에는 부식액, pH 적정제, 연마입자 등이 첨가되는데 이때 연마입자가 응집하여 Slurry의 분산 안전성 저하에 영향을 줄수 있다. 이로 인해 응집된 Slurry는 Scratch와 Delamination 과 같은 표면 결함을 유발할 수 있으며, Slurry의 저장 안정성을 저하시켜 Slurry의 물리적 화학적 특성을 변화시킬 수 있다. 그리하여 본 연구에서는 Ru CMP Slurry에서의 Surfactant와 같은 분산 안정제에 따른 Surface tension, Zeta potential, Particle size, Sedimentation의 분석을 통해 Slurry 안정성에 대한 영향을 살펴보았다. 그 결과 pH9 조건의 31ppm Dispersant 농도에서 50%이상의 Sedimentation 상승효과를 얻을 수 있었다. 또한 선택된 Surfactant가 첨가된 Ru CMP Slurry를 제조하여 Ru wafer의 Static etch rate, Passivation film thickness 와 Wettability를 비교해 보았다. 그리고 CMP 공정을 실시하여 Ru의 Removal rate와 TEOS에대한 Selectivity를 측정해 보았다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.12
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• pp.750-758
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• 2016

For the channel doping of shallow junction and retrograde well formation in CMOS, indium can be implanted in silicon. The retrograde doping profiles can serve the needs of channel engineering in deep MOS devices for punch-through suppression and threshold voltage control. Indium is heavier element than B, $BF_2$ and Ga ions. It also has low coefficient of diffusion at high temperatures. Indium ions can be cause the erode of wafer surface during the implantation process due to sputtering. For the ultra shallow junction, indium ions can be implanted for p-doping in silicon. UT-MARLOWE and SRIM as Monte carlo ion-implant models have been developed for indium implantation into single crystal and amorphous silicon, respectively. An analytical tool was used to carry out for the annealing process from the extracted simulation data. For the 1D (one-dimensional) and 2D (two-dimensional) diffused profiles, the analytical model is also developed a simulation program with $C^{{+}{+}}$ code. It is very useful to simulate the indium profiles in implanted and annealed silicon autonomously. The fundamental ion-solid interactions and sputtering effects of ion implantation are discussed and explained using SRIM and T-dyn programs. The exact control of indium doping profiles can be suggested as a future technology for the extreme shallow junction in the fabrication process of integrated circuits.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.05a
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• pp.593-596
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• 1999

This paper presents a process optimization of antireflectiun (AR) coating on crystalline Si solar cells. Theoretical and experimental investigations were performed on a doble-layer AR(DLAR) coating of MgF$_2$/CeO$_2$, We investigated CeO$_2$ films as an All layer because they hale a proper refractive index of 2.46 and demonstrate the same lattice constant as Si substrate. RF sputter grown CeO$_2$ film showed strong dependence on a deposition temperature. The CeO$_2$ film deposited at 400 $^{\circ}C$ exhibited a strong (111) preferred orientation and the lowest surface roughness of 6.87 $\AA$. Refractive index of MgF$_2$ film was measured as 1.386 for the most of growth temperature. An optimized DLAR coating showed a reflectance as low as 2.04 % in the wavelengths ranged from 0.4 7m to 1.1 7m. We achieved the efficiencies of solar cells greater than 15% with 3.12 % improvement with DLAR coatings . Further details on MgF$_2$, CeO$_2$ films, and cell fabrication Parameters are presented in this paper.