• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.697-705
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• 2014

A single chip Programmable AC to DC Power Converter, consisting of wide band gap SiC MOSFET and SiC diodes, has been proposed which converts high frequency ac voltage to a conditioned dc output voltage at user defined given power level. The converter has high conversion efficiency because of negligible reverse recovery current in SiC diode and SiC MOSFET. High frequency operation reduces the need of bigger size inductor. Lead inductors are enough to maintain current continuity. A complete electrical analysis, die area estimation and thermal analysis of the converter has been presented. It has been found that settling time and peak overshoot voltage across the device has reduced significantly when SiC devices are used with respect to Si devices. Reduction in peak overshoot also increases the converter efficiency. The total package substrate dimension of the converter circuit is only $5mm{\times}5mm$. Thermal analysis performed in the paper shows that these devices would be very useful for use as miniaturized power converters for load currents of up to 5-7 amp, keeping the package thermal conductivity limitation in mind. The converter is ideal for voltage requirements for sub-5 V level power supplies for high temperatures and space electronics systems.

• Journal of Power Electronics
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• v.4 no.1
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• pp.56-63
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• 2004

A new driving circuit for the SPSS (Single-Pulse Soft-Switching) PFC converter is proposed. The switching device of a SPSS converter switches once in every half cycle of an AC commercial power source. Therefore, it can be solved many problems caused by the high frequency operation. The proposed SPSS converter achieves the soft-switching operation and the EMI noise can be reduced. The resonant capacitor voltage supplies to the resonant inductor even if the input AC voltage is the vicinity of zero cross voltage. Then, the power factor and input current waveform can be improved without delay time. A new driving circuit achieves the operation of SPSS converter by one switching drive circuit. The proposed converter can be satisfied the IEC standard sufficiently

• Proceedings of the KIPE Conference
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• 2003.07b
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• pp.1002-1007
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• 2003

A new driving circuit for the SPSS (Single-Pulse Soft-Switching) PFC converter is proposed. The switching device of a SPSS converter switches once In every half cycle of an AC commercial power source. Therefore, it can be solved many problems caused by the high frequency operation. The proposed SPSS converter achieves the soft-switching operation and the EMI noise can be reduced. The resonant capacitor voltage supplies to the resonant inductor even if the input AC voltage is the vicinity of zero cross voltage. Then, the power factor and input current waveform can be improved without delay time. A new driving circuit achieves the operation of SPSS converter by one switching drive circuit. The proposed converter can be satisfied the IEC standard sufficiently.

• Journal of Power Electronics
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• v.11 no.5
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• pp.662-668
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• 2011

This paper presents an analysis of a 4th order LCLC resonant converter with a capacitive output filter using the state-space approach. The analysis of the converter shows that there are four intervals in a half period. In each interval, the state-space equations are obtained. Due to the soft switching of the converter, an exact equation for the Zero Voltage Switching (ZVS) time and the maximum dead time of the inverter switches are presented. The simulation and experimental results obtained from a 10kv, 370w prototype confirm the validity of the theoretical analysis.

• Journal of Power Electronics
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• v.15 no.1
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• pp.86-95
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• 2015

An active clamp high step-up boost converter with a coupled inductor is proposed in this paper. In the proposed strategy, a coupled inductor is adopted to achieve a high voltage gain. The clamp circuit is included to achieve the zero-voltage-switching (ZVS) condition for both the main and clamp switches. A rectifier composed of a capacitor and a diode is added to reduce the voltage stress of the output rectifier diode. As a result, diodes with a low reverse-recovery time and forward voltage-drop can be utilized. Since the voltage stresses of the main and clamp switches are far below the output voltage, low-voltage-rated MOSFETs can be adopted to reduce conduction losses. Moreover, the reverse-recovery losses of the diodes are reduced due to the inherent leakage inductance of the coupled inductor. Therefore, high efficiency can be expected. Firstly, the derivation of the proposed converter is given and the operation analysis is described. Then, a steady-state performance analysis of the proposed converter is analyzed in detail. Finally, a 250 W prototype is built to verify the analysis. The measured maximum efficiency of the prototype is 95%.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.27 no.12
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• pp.114-124
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• 2013

Recently, the real time simulator to develop the inverter drive board and motor control algorithm for high power induction motor and PM synchronous motor is required. In this paper, the real time simulator based on the voltage control for a PM synchronous motor is proposed. The resistor, inductor, and the induced voltage for the modeling of a PM synchronous motor is implemented by the power converter including the LCL filter and the PWM rectifier. The induced voltage of a PM synchronous motor is simulated by the capacitor voltage of the LCL filter, which is controlled by PI voltage controller and the deadbeat current controller. The operation and the simulated characteristics of the proposed real time simulator for a PM synchronous motor is verified by the simulation.

• Journal of information and communication convergence engineering
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• v.10 no.2
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• pp.187-193
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• 2012

A 1 GHz CMOS fast-lock phase-locked loop (PLL) is proposed to support the quick wake-up time of mobile consumer electronic devices. The proposed fast-lock PLL consists of a conventional charge-pump PLL, a frequency-to-digital converter (FDC) to measure the frequency of the input reference clock, and a digital-to-analog converter (DAC) to generate the initial control voltage of a voltage-controlled oscillator (VCO). The initial control voltage of the VCO is driven toward a reference voltage that is determined by the frequency of the input reference clock in the initial mode. For the speedy measurement of the frequency of the reference clock, an FDC with a parallel architecture is proposed, and its architecture is similar to that of a flash analog-to-digital converter. In addition, the frequency-to-voltage converter used in the FDC is designed simply by utilizing current integrators. The circuits for the proposed fast-lock scheme are disabled in the normal operation mode except in the initial mode to reduce the power consumption. The proposed PLL was fabricated by using a 0.18-${\mu}m$ 1-poly 6-metal complementary metal-oxide semiconductor (CMOS) process with a 1.8 V supply. This PLL multiplies the frequency of the reference clock by 10 and generates the four-phase clock. The simulation results show a reduction of up to 40% in the worstcase PLL lock time over the device operating conditions. The root-mean-square (rms) jitter of the proposed PLL was measured as 2.94 ps at 1 GHz. The area and power consumption of the implemented PLL are $400{\times}450{\mu}m^2$ and 6 mW, respectively.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.62 no.8
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• pp.1101-1107
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• 2013

A light emitting diodes(LED) lighting has been increasingly used due to its low power consumption, long life time, high efficiency, and environment friendly characteristics. Also various power converters has been applied to drive these LED lighting. Among many power converters, a LLC resonant converter could be applied for LED lighting because of its high efficiency and high power density. Furthermore, the function of power factor correction(PFC) might be added. In this paper, 1-stage asymmetrical LLC resonant converter is proposed. The proposed converter performs both input-current harmonics reduction and PFC using the discontinuous conduction mode(DCM). The proposed 1-stage LLC resonant converter approach has the lower voltage stress across switching devices and achieve the zero voltage switching(ZVS) in switching devices. To verify the performance of the proposed converter, simulation and experimental results from a 300[W] prototype are provided.

• 전기의세계
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• v.23 no.4
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• pp.60-65
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• 1974

This paper is to study on the pilot work of bi-directional S.C.R. power converter adopted by the method of diode-bridge type circuit. This apparatus acts as a converter when it is used in convering 3-phase a.c source to d.c output, and it can be used as an inverter which recovering surplus d.c power to a.c source when d.c load become active to cause the induced voltage higher than the presetted point of d.c output voltage. At the same time, its d.c voltage varies continuously in the presetted range of positive and/or negative polarity. As a result of test, the AC/DC bi-directional power converter represents maximum converting efficiency of 91% and power factor of 0.98. Furthermore, this converter also can be applied as a cycleconverter by varying the period of gate triggering signal.

• 한국신재생에너지학회:학술대회논문집
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• 2008.10a
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• pp.94-97
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• 2008

In this paper, A Digital Voltage Mode Controller is designed for the Photovoltaic power converter applications. The designed Digital Voltage Mode Controller is derived analytically from the continuous time small signal model of the boost converter. Due to the small signal model based derivations of the control law, the designed control method can be applicable to K-factor Approach method and bilinear transformation. In order to show the usefulness of a designed controller, and the simulation results are verified.