• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.26 no.11
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• pp.54-61
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• 2012

This study investigated the relationship between the response time of DVR (Dynamic Voltage Restorer) and the possible compensation range for voltage dips by the DVR system which protects the 3-phase phase-controlled rectifier from said dips. As a result, the permissible range of voltage dip is presented in a 3-phase phase-controlled rectifier. When the DVR compensates for voltage dip, the range of voltage dip can be compensated according to the DVR's response time. Using the proposed method, DVR response time can be determined from the parameters of the 3-phase phase-controlled rectifier and the possible compensatory range of voltage dip, while at the same time it is possible to use a control system having an appropriate speed. Therefore, the use of excessively fast equipment can be avoided, improving the stability of the overall system. The reliability of the DVR concerning the 3-phase phase-controlled rectifier can be verified by simulation.

• Journal of Institute of Control, Robotics and Systems
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• v.10 no.4
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• pp.325-333
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• 2004

It is investigated that the relation between the response time of DVR(Dynamic Voltage Restorer) and the possible compensation range of voltage dip by the DVR system which protects the 3-phase phase-controlled rectifier from voltage dip. As a result, the permissible range of voltage dip is presented in the 3-phase phase-controlled rectifier, and it is presented that the range of voltage dip which can be compensated according to the DVR s response time. when the DVR compensates voltage dip, Using the proposed method, the DVR s response time can be determined from the parameters of 3-phase phase-controlled rectifier and the possible compensation range of voltage dip, and it is possible to use the control system which have an appropriate speed. Therefore, the use of excessively fast device can be avoided, and the stability of the overall system is improved. Also the reliance of DVR about the 3-phase phase-controlled rectifier can be verified.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.52 no.5
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• pp.238-245
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• 2003

In this paper, a single Phase voltage source voltage-controlled active power filter(APF) for power quality improvement was proposed. The proposed APF has the performance of harmonic suppression and unity power factor correction. The performance of harmonic suppression can be obtained by controlling the waveshape of the APF output voltage to be sine wave. And, unity power factor is controlled by the reactive power control loop of the APF output. Simulation and experimental results using diode rectifier showed that the voltage-controlled APF, unlike the current-controlled APF, can reduce the voltage harmonics as well as current harmonics. Also the results showed that the input dover factor and power quality were greatly improved.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.50 no.11
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• pp.563-567
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• 2001

ln this paper, the designed DVSC(Discrete Variable Structure Controller) is applied to the robust control of voltage controlled APF(Active Power Filter). The voltage controlled APF has good characteristics of reducing harmonic current and harmonic voltage simultaneously. However, voltage controlled APF with large capacitor has slow dynamic response. For improving the dynamics and robustness against to disturbances, DVSC is adopted. According to the results of experiment and simulation, it is proved that the proposed system has the performance of improving dynamic response and robustness.

• Journal of Power Electronics
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• v.17 no.2
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• pp.570-578
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• 2017

This paper proposes a method to stabilize the output voltage of the secondary side of an Inductive Power Transfer (IPT) system through tuning/detuning via a serial tuned DC Voltage-controlled Variable Capacitor (DVVC). The equivalent capacitance of the DVVC changes with the conduction period of a diode in the DVVC controlled by DC voltage. The output voltage of an IPT system can be made constant when this DVVC is used as a variable resonant capacitor combined with a PI controller generating DC control voltage according to the fluctuations of the output voltage. Since a passive diode instead of an active switch is used in the DVVC, there are no active switch driving problems such as a separate voltage source or gate drivers, which makes the DVVC especially advantageous when used at the secondary side of an IPT system. Moreover, since the equivalent capacitance of the DVVC can be controlled smoothly with a DC voltage and the passive diode generates less EMI than active switches, the DVVC has the potential to be used at much higher frequencies than traditional switch mode capacitors.

• Journal of Multimedia Information System
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• v.5 no.2
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• pp.139-142
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• 2018

This work presents a novel architecture of phase locked loop (PLL) with the current compensating scheme to improve phase noise characteristic. The proposed PLL has two charge pumps (CP), main-CP (MCP) and sub-CP (SCP). The smaller SCP current with same time duration but opposite direction of UP/DN MCP current is injected to the loop filter (LF). It suppresses the voltage fluctuation of LF. The PLL has a novel voltage controlled oscillator (VCO) consisting of a voltage controlled resistor (VCR) and the three-stage ring oscillator with latch type delay cells. The VCR linearly converts voltage into current, and the latch type delay cell has short active on-time of transistors. As a result, it improves phase noise characteristic. The proposed PLL has been fabricated with $0.35{\mu}m$ 3.3 V CMOS process. Measured phase noise at 1 MHz offset is -103 dBc/Hz resulting in 3 dBc/Hz phase noise improvement compared to the conventional PLL.

• Journal of Advanced Navigation Technology
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• v.21 no.5
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• pp.501-507
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• 2017

When zenor diode load current is necessary to be controlled by input voltage as a circuit load, existing voltage controlling method cannot be applied to it because the output current of zenor diode is changed due to breakdown voltage variations. We propose input voltage controlled output current source regardless of zenor breakdown voltage variation due to degradation resulted from severe current applied electronic component life test as a circuit load in this paper. We show breakdown voltage characteristics of this zenor diode circuit through simulation, applying adequate values for each component in order to verify the circuit composed of that method, and then show the result in which output current is controlled by input voltage. We confirmed the output current varies proportional to input voltage, and developed circuit shows a constant value independent of zenor diode breakdown voltage variations due to component degradations.

• Proceedings of the KIEE Conference
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• 1991.11a
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• pp.207-209
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• 1991

This paper deals with voltage control method of PWM rectifier using current-controlled voltage type converter. A linearized model of the current-controlled rectifier is derived, which is used to examine the effect of controller gains to its dynamic responses. Through the simulation, it is shown that the proposed model is generally valid, which is confirmed by experimental results.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.4
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• pp.601-605
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• 2012

The non-controlled closing of High-voltage SF6 gas circuit breaker can cause transient current and overvoltage in the field. The controlled closing technology is an effective way to reduce transient current and voltage, prevent equipment failures, and improve power quality. For the development of controlled closing, it is obviously necessary to determine the withstand voltage between arc contacts of High-voltage SF6 gas circuit breaker in making operation. This paper focuses on decrease of pressure and density of SF6 gas that can affect withstand voltage between arc contacts in making operation. The dielectric strength between arc contacts could be improved by minimizing the decrement of pressure and density of SF6 gas obtained by simulation and test and moreover the rate of decrease of dielectric strength (RDDS) of arc contacts could be foreseen.

• International journal of advanced smart convergence
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• v.10 no.1
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• pp.12-23
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• 2021

This paper proposes a low power radio frequency receiver front-end where, in a single stage, single-balanced mixer and voltage-controlled oscillator are stacked on top of low noise amplifier and re-use the dc current to reduce the power consumption. In the proposed topology, the voltage-controlled oscillator itself plays the dual role of oscillator and mixer by exploiting a series inductor-capacitor network. Using a 65 nm complementary metal oxide semiconductor technology, the proposed radio frequency front-end is designed and simulated. Oscillating at around 2.4 GHz frequency band, the voltage-controlled oscillator of the proposed radio frequency front-end achieves the phase noise of -72 dBc/Hz, -93 dBc/Hz, and -113 dBc/Hz at 10KHz, 100KHz, and 1 MHz offset frequency, respectively. The simulated voltage conversion gain is about 25 dB. The double-side band noise figure is -14.2 dB, -8.8 dB, and -7.3 dB at 100 KHz, 1 MHz and 10 MHz offset. The radio frequency front-end consumes only 96 ㎼ dc power from a 1-V supply.