• Journal of Power Electronics
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• 제3권4호
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• pp.215-223
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• 2003

In this paper, a new zero-current-transition (ZCT) circuit cell is proposed. The main switch is turned-off under the zero current and zero voltage condition, and there is no additional current stress and voltage stress in the main switch and the main diode, respectively. The auxiliary switch is turned-off under the zero voltage condition, and the main diode is turned-on under the zero voltage condition. The resonant current required to obtain the ZCT condition is relatively small and regenerated to the input voltage source. The operational principles of a boost converter integrated with the proposed ZCT circuit cell are analyzed and verified by the simulation and experimental results.

• Journal of the Korean Data and Information Science Society
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• 제15권4호
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• pp.935-943
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• 2004

Most of the accelerated life tests deal with tests that use only one accelerating variable and no other explanatory variables. Frequently, however, there is a test to use more than one accelerating or other experimental variables, such as, for examples, a test of capacitors at higher than usual conditions of temperature and voltage, a test of circuit boards at higher than usual conditions of temperature, humidity and voltage. A accelerated life test is extended to M-level stress accelerated life test with k-stress variables. The optimal design for Weibull distribution is studied with k-stress variables.

• 한국결정성장학회지
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• 제10권6호
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• pp.412-417
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• 2000

High electric field stressed trap distributions were investigated in the thin silicon oxide of polycrystalline silicon gate metal oxide semiconductor capacitors. The transient currents associated with the off time of stressed voltage were used to measure the density and distribution of high voltage stress induced traps. The transient currents were due to the discharging of traps generated by high stress voltage in the silicon oxides. The trap distributions were relatively uniform near both cathode and anode interface in polycrystalline silicon gate metal oxide semiconductor devices. The stress generated trap distributions were relatively uniform the order of $10^{11}$~$10^{12}$ [states/eV/$\textrm{cm}^2$] after a stress. The trap densities at the oxide silicon interface after high stress voltages were in the $10^{10}$~$10^{13}$ [states/eV/$\textrm{cm}^2$]. It was appeared that the transient current that flowed when the stress voltages were applied to the oxide was caused by carriers tunneling through the silicon oxide by the high voltage stress generated traps.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1992년도 하계학술대회 논문집 B
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• pp.1019-1021
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• 1992

This paper deals with the stress of the converters using the resonant switches. It is represented the reduction of the voltage and current stresses. According to the configuration of the multiple poly-phase converter. Especially, about buck ZVS-QRC it is studied the reduction of the voltage stress, and represented the result of simulation.

• 조명전기설비학회논문지
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• 제16권5호
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• pp.7-13
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• 2002

고효율 고전력 밀도를 제공하는 공진형 컨버터에 있어서 스위치에 걸리는 전압 스트레스는 입력전압의 4∼5배 정도여서, 높은 정격의 소자를 필요로 하기 때문에 전도손실을 증가시킨다. 본 논문에서는 이러한 문제점을 해결하기 위해 제안했던 교번으로 동작하는 포워드 다중공진형 컨버터에 적용한 회로 형태를 다른 컨버터에 적용한 예를 제시하였다. 그리고 제안한 AT포워드 다중공진형 컨버터의 루프 이득 특성을 알아보기 위해 HP4194A 네트워크 해석기를 이용해 실험적으로 측정한 결과에 대해 고찰하였다.

• 대한전자공학회논문지
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• 제11권3호
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• pp.22-26
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• 1974

The effects of anisotropic mechanical stress applied normal to the surface of p-n junctions have been investigated. As the stress increased, the breakdown voltage was decreased and the breakdown mode became softer. Within a certain limitation in the applied stress, the above phenomena werw reversibbe, though relaxation and hysteresis phenomena were observed. The time constant of relaxation depended upon the shape of the stressing tip, but for the given tip and device a unique time constant was obtained. The stress.dependence of breakdown voltage showed a good linearity up to about 3.0${\times}10^4$ kgw/$\textrm{cm}^2$, when the flat tip of radius 15$\mu$ was used, and the temperatere-dependence of breakdown voltage under the stress also showed a good linearity in the temperature range of 100 to $300^{\circ}K$.

• 대한전자공학회논문지
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• 제25권7호
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• pp.780-790
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• 1988

We have studied the hot-carrier-induced degradation caused by the high channel electric field due to the decrease of the gate length of MOSFET used in VLSI. Under DC stress, the condition in which maximum substrate current occures gave the worst degradation. Under AC dynamic stress, other conditions, the pulse shape and the falling rate, gave enormous effects on the degradation phenomena, especially at 77K. Threshold voltage, transconductance, channel conductance and gate current were measured and compared under various stress conditions. The threshold voltage was almost completely recovered by hot-injection stress as a reverse-stress. But, the transconductance was rapidly degraded under hot-hole injection and recovered by sequential hot-electron stress. The Si-SiO2 interface state density was analyzed by a charge pumping technique and the charge pumping current showed the same trend as the threshold voltage shift in degradation process.

• 전력전자학회논문지
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• 제20권2호
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• pp.122-129
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• 2015

In this study, we propose a low voltage stress and cost-effective light emitting diode (LED) driver capable of multi-channel current balancing. Conventional LED drivers require as many boost converters as the number of LED channels, whereas the proposed LED driver requires only one buck converter and several balancing capacitors instead of several expensive boost converters. Additionally, while the components of the boost converter have high voltage stress and depend on the LED driving voltage, components of the proposed driver have about one-half of the voltage stress across all components. The proposed driver exhibits high reliability and cost effectiveness because it only uses few DC blocking capacitors with no additional active devices to balance the current of multi-channel LEDs. The proposed driver exhibits high reliability and cost effectiveness. The validity of the proposed driver is confirmed through a theoretical analysis. An explanation of the design considerations and experimental results were obtained using a prototype applicable to a 46" LED-TV.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1997년도 하계학술대회 논문집 F
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• pp.1999-2001
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• 1997

The main two drawbacks of the Sin91e Stage PFC (SS-PFC) converters employing a DCM Boost PFC cell are relatively high voltage stress on the bulk capacitor and the input current harmonic distortion. The high voltage stress on bulk capacitor makes the SS-PFC converter impractical in a universal input application and the input current harmonic distortion lowers power factor. In this paper a selective variable frequency control that reduces the voltage stress on the bulk capacitor and the input current harmonic distortion is proposed. Computer simulation results of the proposed control method are presented.

• Transactions on Electrical and Electronic Materials
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• 제16권4호
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• pp.173-178
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• 2015

In lieu of the excellent radio frequency (RF) performance of microelectromechanical system ( MEMS) switches, these micro switches need higher actuation voltage for their operation. This requirement is secondary to concerns over the swtiches’ reliability. This paper reports high reliability operation of RF MEMS switches with low voltage requirements. The proposed switch is optimised to perform in the Q-band, which results in actuation voltage of just 16.4 V. The mechanical stress gradient in the thin micro membrane is computed by simulating von Mises stress in a multi-physics environment that results in 90.4 MPa stress. The computed spring constant for the membrane is 3.02 N/m. The switch results in excellent RF performance with simulated isolation of above 38 dB, insertion loss of less than 0.35 dB and return loss of above 30 dB in the Q-band.