• Journal of IKEEE
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• v.12 no.1
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• pp.34-42
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• 2008

This paper proposes a new on-chip voltage down converter(VDC), which employs a new reference voltage generator(RVG). The converter adopts a temperature-independence reference voltage generator, and a voltage-up converter. The architecture of the proposed VDC has a high-precision, and it was verified based on a 0.25${\mu}m$ 1P5M standard CMOS technology. For 2.5V to 1.0V conversion, the RVG circuit has a good characteristics such as temperature dependency of only 0.2mV/$^{\circ}C$, and the voltage-up circuit has a good voltage deviation within ${\pm}$0.12% for ${\pm}$5% variation of supply voltage VDD. The output voltage is stabilized with ${\pm}$1mV for load current varying from 0 to 100mA.

• Journal of Power Electronics
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• v.15 no.5
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• pp.1235-1243
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• 2015

This paper presents a modified Space Vector Pulse Width Modulation Technique (SVPWM), which solves the well-known problem of voltage imbalance in the capacitors of a single-phase multilevel inverter. The proposed solution is based on the measurement of DC voltage levels at each capacitor of the inverter DC bus. The measurements are then used to adjust the size of the active vectors within the SVPWM algorithm to keep the voltage waveform sinusoidal regardless of any voltage imbalance on the DC link capacitors. When a voltage deviation exceeds a predetermined hysteresis band, the correspondent voltage vector is restricted to restore the voltage level to an acceptable threshold. Hence, the need for external voltage regulators for the voltage capacitors is eliminated. The functionality of the proposed algorithm is successfully demonstrated through simulations and experiments on a grid tied application.

• Proceedings of the KIEE Conference
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• 2004.11a
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• pp.67-69
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• 2004

ZnO varistor ceramics which were fabricated with variation of added of 0.01, 0.02, 0.03, 0.05, 0.1mol% $Nb_2O_5$ sintered at $1150^{\circ}C$. In the specimen added 0.05mol% $Nb_2O_5$, sintered density was $5.87g/cm^3$ and electrical properties were superior to any other components. The nonlinear coefficient was 75, and clamping voltage ratio was 1.40. And, endurance surge current in the specimen added 0.05mol% $Nb_2O_5$ was $6500A/cm^2$, and deviation of varistor voltage was -1.7%. As P.C.T and T.C.T environment test were succeed in all specimens, and deviation of varistor voltage in the specimen added 0.3mol% $Nb_2O_5$ was -0.81%. All specimens showed a good leakage current property in the High Temperature Continuous Load Test for 1000hr, at $85^{\circ}C$, and variation rate of the varistor voltage was -1.71%.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.110-113
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• 2004

ZnO varistor ceramics which were fabricated with variation of added of $0.5{\sim}1.0mol%\;Co_3O_4$ sintered at $1150^{\circ}C$. In the specimen added $0.7mol%\;Co_3O_4$, sintered density was $6.03g/cm^3$ and electrical peoperties were superior to any other components. The nonlinear coefficient a was 83, and clamping voltage ratio was 1.35. But, endurence surge current in the specimen added $0.5mol%\;Co_3O_4$ was $7000A/cm^2$, and deviation of varistor voltage was ${\Delta}-3.23%$. As P.C.T and T.C.T environment test were succeed in all specimens, and deviation of varistor voltage in the specimen added $0.6mol%\;Co_3O_4$ was ${\Delta}-0.81%$. All specimens showed a good leakage current property in the High Temperature Continuous Load Test for 1000hr, at $85^{\circ}C$, and variation rate of the varistor voltage was ${\Delta}-2%$.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.11
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• pp.1186-1191
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• 2004

ZnO varistor ceramics which were fabricated with variation of added of 0.5～1.0 mol% Co$_3$O$_4$, were sintered at 1150 $^{\circ}C$. In the specimen added 0.7 mol% Co$_3$O$_4$, sintered density was 6.03 g/㎤ and electrical properties were superior to any other compositions. The nonlinear coefficient a and clamping voltage ratio were 83 and 1.35, respectively. But, endurance surge current in the specimen added 0.5 mol% Co$_3$O$_4$ was 7000 A/$\textrm{cm}^2$, and deviation of varistor voltage was Δ-3.23 %. As P.C.T and T.C.T environmental test were succeed in all specimens, and deviation of varistor voltage in the specimen added 0.6 mol% Co$_3$O$_4$ was Δ-0.81 %. All specimens showed good leakage current property on the High Temperature Continuous Load Test(HTCLT) for 1000 hr at 85 $^{\circ}C$ and variation rate of the varistor voltage below Δ-2.0 %.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.11
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• pp.2709-2714
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• 2014

This paper has analyzed the change of threshold voltage and conduction path for the ratio of top and bottom gate oxide thickness of asymmetric double gate MOSFET. The asymmetric double gate MOSFET has the advantage that the factor to be able to control the current in the subthreshold region increases. The analytical potential distribution is derived from Poisson's equation to analyze the threshold voltage and conduction path for the ratio of top and bottom gate oxide thickness. The Gaussian distribution function is used as charge distribution. This analytical potential distribution is used to derive off-current and subthreshold swing. By observing the results of threshold voltage and conduction path with parameters of bottom gate voltage, channel length and thickness, projected range and standard projected deviation, the threshold voltage greatly changed for the ratio of top and bottom gate oxide thickness. The threshold voltage changed for the ratio of channel length and thickness, not the absolute values of those, and it increased when conduction path moved toward top gate. The threshold voltage and conduction path changed more greatly for projected range than standard projected deviation.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.59 no.3
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• pp.325-329
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• 2010

Capacitor has been used principally for the power factor compensation long ago. However now it does as passive filter to reduce harmonics of nonlinear load with reactor. Most of the customer's low-voltage feeder has been designed with approximately balanced and connected at the 3 phase four wire system. But voltage and current unbalance is appeared by the mixing operation of single or three phase load etc. The addition of reactor at the condenser may rise its terminal voltage. Voltage and current values above rating can act on electrical stress on the condenser. In this paper, we calculated and measured that voltage, current and capacity of condenser are changed under the voltage balance. We conclude that magnitude and deviation of phase voltage act on major point of electrical stress.

• Journal of Power Electronics
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• v.15 no.4
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• pp.861-875
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• 2015

This paper presents a wide frequency range LLC resonant controller IC for LED backlight units. In this paper a new phase-domain resonance deviation prevention circuit (RDPC), which covers a wide frequency and input voltage range, is proposed. In addition, a wide range gate clock generator and an automatic dead time generator are proposed. The chip is fabricated using 0.35 μm BCD technology. The die size is 2 x 2 mm2. The frequency of the clock generator ranges from 38 kHz to 400 kHz, and the dead time ranges from 300 ns to 2 μs. The current consumption of the LLC resonant controller IC is 4 mA for a 100 kHz operation frequency using a supply voltage of 15 V.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.177-178
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• 2015

This paper presents a neutral point deviation compensating control algorithm applied to a 3-level NPC converter. The neutral point deviation is analyzed with a focus on the current flowing out of or into the neutral point of the dc link. Based on the zero sequence components of the reference voltages, this paper analyzes the neutral point deviation and balancing control for 3-level NPC converter. An analytical method is proposed to calculate the injected zero sequence voltage for NP balancing based on average neutral current. This paper also proposes a control scheme compensating for the neutral point deviation under generalized unbalanced grid operating conditions. The positive and negative sequence components of the pole voltages and ac input currents are employed to accurately explain the behavior of 3-level NPC converter. Simulation and experimental results for a test set up of 30kW are shown to verify the validity of the proposed algorithm.

• The Transactions of the Korean Institute of Power Electronics
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• v.27 no.2
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• pp.142-149
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• 2022

In increasing the safety and usage of lithium-ion battery packs, reducing the parameter deviation between cells, such as voltage and temperature within the battery pack, is important. In this study, we propose a screening method to reduce parameter deviation between cells in battery packs. Screening algorithms are constructed based on Fuzzy logic and quantitatively express the similarities between battery cells. Screening is applied by utilizing series resistance components after experiments of electrical characteristics that consider the operation status of battery packs. After screening, the standard deviation of series resistance components according to the similarity ranking is compared and analyzed, and their conformity are verified with the algorithm parameters.