• 한국태양에너지학회 논문집
• /
• 제29권5호
• /
• pp.65-72
• /
• 2009

The new method is proposed to improve high speed detection of grid voltage phase and magnitude during a voltage dip due to a grid faults. Usually, A LPF(Low Pass Filter) is used in the feedback loop of PLL (Phase Locked Loop) system because the measured grid voltage contains harmonic distortions and sensor noises. so, a new design method of the loop gain of the PI -type controller in the PLL system is proposed with the consideration of the dynamics of the LPF. As a result, a better transient response can be obtained with the proposed design method. The LPF frequency and PI controller gain are designed in coordination according to the steady state and dynamic performance requirement. This paper shows the feasibility and the usefulness of the proposed methods through the computer simulation and the lab-scale experiments.

• Journal of Electrical Engineering and Technology
• /
• 제2권3호
• /
• pp.358-365
• /
• 2007

This paper deals with a novel solid state controller (NSSC) for parallel operated isolated asynchronous generators (IAG) feeding 3-phase 4-wire loads in constant power applications, such as uncontrolled pico hydro turbines. AC capacitor banks are used to meet the reactive power requirement of asynchronous generators. The proposed NSSC is realized using a set of IGBTs (Insulated gate bipolar junction transistors) based current controlled 4-leg voltage source converter (CC-VSC) and a DC chopper at its DC bus, which keeps the generated voltage and frequency constant in spite of changes in consumer loads. The complete system is modeled in MATLAB along with simulink and PSB (power system block set) toolboxes. The simulated results are presented to demonstrate the capability of isolated generating system consisting of NSSC and parallel operated asynchronous generators driven by uncontrolled pico hydro turbines and feeding 3-phase 4-wire loads.

• IEIE Transactions on Smart Processing and Computing
• /
• 제4권5호
• /
• pp.371-378
• /
• 2015

In this paper, a different type of pulse width modulation (PWM) control scheme for a buck converter is introduced. The proposed buck converter uses PWM with frequency hopping and a low quiescent.current low dropout (LDO) voltage regulator with a power supply rejection ratio enhancer to reduce high spurs, harmonics and output voltage ripples. The low quiescent.current LDO voltage regulator is not described in this paper. A three-bit binary-to-thermometer decoder scheme and voltage ripple controller (VRC) is implemented to achieve low voltage ripple less than 3mV to increase the efficiency of the buck converter. An internal clock that is synchronized to the internal switching frequency is used to set the hopping rate. A center frequency of 2.5MHz was chosen because of the bluetooth low energy (BLE) application. This proposed DC-DC buck converter is available for low-current noise-sensitive loads such as BLE and radio frequency loads in portable communications devices. Thus, a high-efficiency and low-voltage ripple is required. This results in a less than 2% drop in the regulator's efficiency, and a less than 3mV voltage ripple, with -26 dBm peak spur reduction operating in the buck converter.

• Journal of Electrical Engineering and Technology
• /
• 제10권1호
• /
• pp.280-287
• /
• 2015

Three-level PWM rectifiers applied in medium voltage applications usually operate at low switching frequency to keep the dynamic losses under permitted level. However, low switching frequency brings a heavy cross-coupling between the current components $i_d$ and $i_q$ with a poor dynamic system performance and a harmonic distortion in the grid-connecting current. To overcome these problems, a mathematical model based on complex variables of the three-level voltage source PWM rectifier is firstly established, and the reasons of above issues resulted from low switching frequency have been analyzed using modern control theory. Then, a novel control strategy suitable for the current decoupling control based on the complex variables for $i_d$ and $i_q$ is designed here. The comparisons between this kind of control strategy and the normal PI method have been carried out. MATLAB and experimental results are given in detail.

• 한국통신학회논문지
• /
• 제42권4호
• /
• pp.864-870
• /
• 2017

본 논문은 넓은 부하 전류를 요구하는 휴대 기기에서 사용될 목적으로 주파수 전압 변환을 이용하여 모드 제어 가능한 듀얼 모드 벅 변환기를 설명한다. 기존의 히스테스테릭 벅 변환기의 문제인 저 부하에서의 PLL 보상 및 효율 저하를 제안하는 듀얼 벅 변환기의 개선된 PFM 모드를 통해 해결한다. 또한 기존의 듀얼 모드 벅 변환기의 주요 회로인 모드 제어기에서의 부하 변화 감지의 어려움과 느린 모드 전환 속도를 제안하는 모드 제어기로 개선 시킨다. 제안하는 모드 제어기는 최소 1.5us의 모드 전환 시간을 가진다. 제안하는 DC-DC 벅 변환기는 $0.18{\mu}m$ CMOS 공정에서 설계하였으며 칩 면적은 $1.38mm{\times}1.37mm$이다. 기생 소자를 포함한 인덕터와 커패시터를 고려한 후 모의실험 결과는 1~500mA의 부하 전류 범위에서 입력 전압을 2.7~3.3V를 가지며 PFM 모드는 65mV이내, 히스테리틱 모드에서는 고정된 스위칭 주파수 상태에서 16mV의 출력 리플 전압을 가지는 1.2V의 출력 전압을 생성한다. 제안하는 듀얼 모드 벅 변환기의 최대 효율은 80mA에서 95%를 나타내며 해당 전체 부하 범위에서 85% 이상의 효율을 지닌다.

• Journal of electromagnetic engineering and science
• /
• 제1권2호
• /
• pp.131-138
• /
• 2001

The DTV (Digital TV) tuner for an 8-VSB (Vestigial Side-Band) modulation was developed to meet the requirements of the ATSC (Advanced Television Systems Committee). The double frequency conversion and the active tracking filter in the front-end were used to cancel interferences between adjacent channels and multi-channels by suppressing the IF beat and the Image frequency. However, It was impossible to get frequency mapping between the tracking filter and the first VCO (Voltage Controlled Oscillator) in the existing DTV tuner structure which differs from the NTSC (National Television Systems Committee) tuner. This paper, therefore, suggests an assailable structure and a new method for the automatic frequency selection by mapping the frequency characteristics over the tracking voltage and the combined HW which is composed of a Micro-controller, an EEPROM (Electrically Erasable Programmable Read Only Memory), a DAC (Digital-to-Analog Converter), an OP amplifier, and a switch driver.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1997년도 하계학술대회 논문집 D
• /
• pp.848-850
• /
• 1997

A control method of UPFC (Unified Power Flow Controller) to reduce low frequency oscillation is proposed. UPFC is modelled by voltage source, which magnitude and phase angle can be controlled. Because there needs some time to change to desired value, d-axis voltage and Q-axis voltage is modeled by 1st order delay. LQG(Linear Quadratic Gaussian) is used. It is shown that low frequency can be damped by control of UPFC effectively.

• 대한전기학회논문지
• /
• 제41권6호
• /
• pp.579-587
• /
• 1992

This paper is to study on the step-up DC-DC converter for power system which yields output characteristics of low voltage and high current, such as fuel cell generation system. DC-AC-DC scheme is suggested for high ratio of voltage conversion. Three phase MOSFET-SPWM inverter is adopted for intermediate AC conversion and inverter output frequency is chosen at 400[Hz] in order to reduce the size of magnetic circuit and DC filter. Since control strategy which combines voltage controller with current controller in parallel is used, good output performance is obtained both in steady state and in transient state like load variation, not only in single unit operation but also in parallel operation.

• Journal of Power Electronics
• /
• 제19권1호
• /
• pp.234-243
• /
• 2019

Studying the control strategy of a microgrid under the load unbalanced state helps to improve the stability of the system. The magnitude of the power fluctuation, which occurs between the power supply and the load, is generated in a microgrid under the load unbalanced state is called negative sequence reactive power $Q^-$. Traditional power distribution methods such as P-f, Q-E droop control can only distribute power with positive sequence current information. However, they have no effect on $Q^-$ with negative sequence current information. In this paper, a stationary-frame control method for power sharing and voltage unbalance compensation in islanded microgrids is proposed. This method is based on the proper output impedance control of distributed generation unit (DG unit) interface converters. The control system of a DG unit mainly consists of an active-power-frequency and reactive-power-voltage droop controller, an output impedance controller, and voltage and current controllers. The proposed method allows for the sharing of imbalance current among the DG unit and it can compensate voltage unbalance at the same time. The design approach of the control system is discussed in detail. Simulation and experimental results are presented. These results demonstrate that the proposed method is effective in the compensation of voltage unbalance and the power distribution.

• Journal of Power Electronics
• /
• 제14권6호
• /
• pp.1100-1108
• /
• 2014

Modular multilevel converters (MMCs) have emerged as the most promising topology for high and medium voltage applications for the coming years. However, one particular negative characteristic of MMCs is the existence of circulating current, which contains a dc component and a series of low-frequency even-order ac harmonics. If not suppressed, these ac harmonics will distort the arm currents, increase the power loses, and cause higher current stresses on the semiconductor devices. Repetitive control (RC) is well known due to its distinctive capabilities in tracking periodic signals and eliminating periodic errors. In this paper, a novel circulating current control scheme base on RC is proposed to effectively track the dc component and to restrain the low-frequency ac harmonics. The integrating function is inherently embedded in the RC controller. Therefore, the proposed circulating current control only parallels the RC controller with a proportional controller. Thus, conflicts between the RC controller and the traditional proportional integral (PI) controller can be avoided. The design methodologies of the RC controller and a stability analysis are also introduced. The validity of the proposed circulating current control approach has been verified by simulation and experimental results based on a three-phase MMC downscaled prototype.