• Journal of the Institute of Convergence Signal Processing
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• v.2 no.3
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• pp.93-101
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• 2001

In this paper, we propose an image downscaler used in multimedia video applications, such as DTV, TV-PIP, PC-video, camcorder, videophone and so on. The proposed image downscaler provides a scaled image of high-quality and high-performance. This paper will explain the scaling theory using two-dimensional digital filters. It is the method that removes an aliasing noise and decreases the hardware complexity, compared with Pixel-drop and Upsamling. Also, this paper will prove it improves scaling precisians and decreases the loss of data, compared with the Scaler32, the Bt829 of Brooktree, and the SAA7114H of Philips. The proposed downscaler consists of the following four blocks: line memory, vertical scaler, horizontal scaler, and FIFO memory. In order to reduce the hardware complexity, the using digital filters are implemented by the multiplexer-adder type scheme and their all the coefficients can be simply implemented by using shifters and adders. It also decreases the loss of high frequency data because it provides the wider BW of 6MHz as adding the compensation filter. The proposed downscaler is modeled by using the Verilog-HDL and the model is verified by using the Cadence simulator. After the verification is done, the model is synthesized into gates by using the Synopsys. The synthesized downscaler is Placed and routed by the Mentor with the IDEC-C632 0.65${\mu}{\textrm}{m}$ library for further IC implementation. The IC master is fixed in size by 4,500${\mu}{\textrm}{m}$$\times$4,500${\mu}{\textrm}{m}$. The active layout size of the proposed downscaler is 2,528${\mu}{\textrm}{m}$$\times$3,237${\mu}{\textrm}{m}$.

• Journal of Multimedia Information System
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• v.7 no.3
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• pp.221-230
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• 2020

Used optimization techniques as solution for mobile network have been implemented as a reference systems for various applications against fading and signals perturbation, in addition each transition to 5th generation telecommunication standards require a deep studies in order to park an applied instantaneous process. The paper describes a preliminary planning and a careful preparation to update both subscriber radio access network as well as data transmission network this approach conducts to make network resource updates invisible for customers and with minimal costs for mobile operators basically in terms of delay. In addition, network operators transit to mobile networks, multimedia services efficient delivery are considered the challenging application and the most promising for mobile network operators today, this work conduct to optimize video consumption of mobile users which are exponentially increasing. The interference is a complex phenomenon in mobile radio telecommunication system, and a mobile phone can be a source of interference to another one. Actual advances in technology necessitate the need for the complicated software solution that can take several unexpected phenomena in consideration to rise to a level higher than ever. The capability needs today require the use of Drive test which is used to take the performance of network in the field by using a special software called TEMS investigation, it have been implemented as standalone systems for various applications. The paper focuses on considering as the best technical for optimization of mobile networks, analysis and processing of signal, a Drive Test is the method used to take the performance of network in the field by using a special software called TEMS investigation. Most used in the world, this software is reputed to detect and analyze many problems of mobile network between the mobile phone and the transmitter: BTS in case of GSM and Node B for UMTS. An example of that is interference in radio communication. It exists permanently and it degrades considerably the quality of received signal when it exceeds certain levels.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.1
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• pp.175-182
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• 2011

In this paper, we implemented a high-performence memory controller which can accommodate processing blocks(multiple masters) in SoC for video signal processing. The memory controller is arbitrated by the internal arbiter which receives request signals from masters and sends grant and data signals to masters. The designed memory controller consists of Master Selector, Mster Arbiter, Memory Signal Generator, Command Decoder, and memory Signal Generator. It was designed using VHDL, and verified using the memory model of SAMSING Inc. For FPGA synthesis and verification, Quartus II of ATERA Inc. was used. The target device is Cyclone II. For simulation, ModelSim of Cadence Inc was used. Since the designed H/W can be stably operated in 174.28MHz, it satisfies the specification of SDRAM technology.

• The Journal of the Acoustical Society of Korea
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• v.28 no.2
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• pp.112-118
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• 2009

This paper proposes a rapid detection algorithm of a salient region for music video browsing system, which can be applied to mobile device and digital video recorder (DVR). The input music video is decomposed into the music and video tracks. For the music track, the music highlight including musical chorus is detected based on structure analysis using energy-based peak position detection. Using the emotional models generated by SVM-AdaBoost learning algorithm, the music signal of the music videos is classified into one of the predefined emotional classes of the music automatically. For the video track, the face scene including the singer or actor/actress is detected based on a boosted cascade of simple features. Finally, the salient region is generated based on the alignment of boundaries of the music highlight and the visual face scene. First, the users select their favorite music videos from various music videos in the mobile devices or DVR with the information of a music video's emotion and thereafter they can browse the salient region with a length of 30-seconds using the proposed algorithm quickly. A mean opinion score (MOS) test with a database of 200 music videos is conducted to compare the detected salient region with the predefined manual part. The MOS test results show that the detected salient region using the proposed method performed much better than the predefined manual part without audiovisual processing.

• IEIE Transactions on Smart Processing and Computing
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• v.1 no.3
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• pp.152-160
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• 2012

This paper proposes a frame-level rate control algorithm for low delay video applications to reduce the fluctuations in the bitrate. The proposed algorithm minimizes the bitrate fluctuations in two ways with minimal coding loss. First, the proposed rate control applies R-Q model to all frames including the first frame of every group of pictures (GOP) except for the first one of a sequence. Conventional rate control algorithms do not use any R-Q models for the first frame of each GOP and do not estimate the generated-bit. An unexpected output rate result from the first frame affects the remainder of the pictures in the rate control. Second, a rate-distortion (R-D) cost is calculated regardless of the hierarchical coding structure for low bitrate fluctuations because the hierarchical coding structure controls the output bitrate in rate distortion optimization (RDO) process. The experimental results show that the average variance of per-frame bits with the proposed algorithm can reduce by approximately 33.8% with a delta peak signal-to-noise ratio (PSNR) degradation of 1.4dB for a "low-delay B" coding structure and by approximately 35.7% with a delta-PSNR degradation of 1.3dB for a "low-delay P" coding structure, compared to HM 8.0 rate control.

• Proceedings of the KIEE Conference
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• 2008.04a
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• pp.113-114
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• 2008

본 논문에서는 HD 비디오 영상 처리를 효과적으로 수행할 수 있는 다중 DSP 아키텍쳐를 제안하고 프로토타입 보드를 설계 제작하였다. 또한, 구현된 보드를 이용하여 비디오 영상 내 물체(얼굴)의 실시간 추석시스템을 구현하였다. 물체 추적 기법인 PF(Particle Filtering) 기법은 배경 클러터가 존재하는 환경에서도 강인하게 물체를 추적할 수 있지만 많은 수의 샘플을 사용하는 경우 필요한 계산량이 많아져 실시간 구현이 매우 어렵다는 문제점을 가지고 있다. 본 논문에서는 이러한 경우에도 실시간 추적이 가능하도록 병렬화된 PF 추적 방법을 제안하고 제작된 보드 상에 구현하였다. 구현된 병렬 처리 추적에서는 150개의 PF 샘플들을 5개의 슬레이브 DSP로 분산하여 컬러 유사도 기탄의 관측 확률을 계산하고 그 결과를 마스터 DSP에서 종합하여 추적의 정확도를 높이고자 하였다. 실험에는 $720{\times}480$ 픽셀 영상이 사용되었으며, 실험 결과 배경 클러터가 존재하는 경우에도 충분한 PF 샘플 수의 사용에 따라 대상 물체를 강인하게 추적하는 우수한 성능을 확인할 수 있었다.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.67 no.10
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• pp.1358-1363
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• 2018

As the usage of the Internet grows and digital media become more diversified, it has become much easier for digital contents to be distributed and shared. This makes easier to access the desired digital contents. On the other hand, there is an increasing need to protect the copyright of digital works. There are some prevalent ways to protect ownership, but they accompany several disadvantages. Among those ways, watermarking methods have the advantage of ensuring invisibility, but they also have a disadvantage that they are vulnerable to external attacks such as a noise and signal processing. In this paper, we propose the detecting method of illegal contents that is robust against external attacks to protect digital works. We extract HSV and LBP features from images and use Euclidian-based hashing techniques to shorten the searching time on high-dimensional and near-duplicate videos. According to the results, the proposed method showed higher detection rates than that of the Watermarking techniques in terms of the images with fabrications or deformations.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.16 no.3
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• pp.138-145
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• 2017

With the increasing use of smart electronic devices, the size of the related I/O interface market is increasing rapidly. Demand is also growing for the continuous increase of data and video signals-such as faster data processing speed and data storage capacity-in the smart electronic device input/output interface market. Currently, the POF hybrid cable used in the smart electronic device input / output interface market cannot transmit over a long distance because the optical loss is too large, and the GOF hybrid cable is both vulnerable to bending and other sudden outside changes, and expensive. Therefore, in this study, the design and fabrication of a GOF hybrid cable and fiber guide were carried out in order to develop a cable which can easily withstand external impact, has low optical losses, and meets the demand for continuous data and video signal increase in the smart electronic device input / output interface market.

• Journal of the Institute of Convergence Signal Processing
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• v.12 no.3
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• pp.204-211
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• 2011

Embedded systems require intensively complex and high power dissipating modules that have the capability of real-time high performance data processing, wide bandwidth communication, and low power consumption. However, the current battery technology has not been developed as much as meeting the requirements of portable embedded systems for long system lifetime. In this paper, new approach that operates with low energy consumption is proposed to overcome the situation while guaranteeing detection accuracy. The designed method associates a variety of detection algorithms hierarchically to detect events happening around the system. The Change for energy consumption characteristics is shown with change for probabilistic characteristics and those relationships are analytically explained from experiments. Furthermore, several techniques to consume low energy and achieve high detection accuracy are described, depending on the event static or dynamic characteristics.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.10a
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• pp.503-506
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• 2015

In accordance with IoT(Internet of Things) commercialization, the need to design SoC-based hardware platform with wireless communication is increasing. This paper therefor proposes an SoC platform architecture with Smart Frame System inter-communicating between devices. Wireless communication functions and high-performance real-time image processing hardware structure was applied to existing digital photo frame. We developed a smart phone application to control the smart frame through Bluetooth communication. The SoC platform hardware consists of CIS controller, Memory controller, ISP(Image Signal Processing) module for image scaling, Bluetooth Interface for inter-communicating between devices, VGA/TFT-LCD controller for displaying video. The Smart Frame System to support the IoT services was implemented and verified using HBE-SoC-IPD test board equipped with Virtex4 XC4VLX80 FPGA. The operating frequency is 54MHz.