• Journal of the Korean Electrochemical Society
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• v.2 no.4
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• pp.237-241
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• 1999

The characteristics of copper thin films and via hole filling capability were investigated by pulsed electrodeposition method. Especially, the effects of additives on the properties of copper thin films were studied. Copper films, which were deposited by pulsed electrodeposition using commercial additives, had low tensile stress value under 83.4 MPa and high preferred Cu (111) texture. Via holes with $0.25{\mu}m$ in diameter and 6 : 1 aspect ratio were successfully filled without any defects by superfilling. It was observed that copper microstructure deformed by twining. After heat treatment at $500^{\circ}C$ for 1 k in vacuum furnace, grain size was 1 or 2 times as large as film thickness and the bamboo structure was formed. Heat treated copper films showed good resistivities of $1.8\~2.0{\mu}{\Omega}{\cdot}cm$.

• Journal of Korean Neurosurgical Society
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• v.45 no.4
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• pp.260-263
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• 2009

Internal carotid artery (ICA) trapping can be used for treating intracranial giant aneurysm, blood blister-like aneurysms and ICA rupture during the surgery. We present a novel ICA trapping technique which can be used with insufficient collaterals flow via anterior communicating artery (AcoA) and posterior communicating artery (PcoA). A patient was admitted with severe headache and the cerebral angiography demonstrated a typical blood blister-like aneurysm at the contralateral side of PcoA. For trapping the aneurysm, the first clip was placed at the ICA just proximal to the aneurysm whereas the distal clip was placed obliquely proximal to the origin of the PcoA to preserve blood flow from the PcoA to the distal ICA. The patient was completely recovered with good collaterals filling to the right ICA territories via AcoA and PcoA. This technique may be an effective treatment option for trapping the aneurysm, especially when the PcoA preservation is mandatory.

• Journal of the Korean Vacuum Society
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• v.7 no.3
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• pp.255-260
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• 1998

The ionized magnetron sputtering is very useful in filling of small metal contact or via in ULSI processing with very high ionization upto 80% based on incoming flux ratio. But fairly high sputtering gas pressure is required to get high ionization, which instead gives low deposition rate and diverse incoming neutral's angular distribution. The electron quenching by heavily sputtered metals and gas rarefaction were considered the main causes of decreased ionization in this process. RF pulsing of sputtering power was proposed to solve those two problems. The results showed that 10㎳/10 ㎳ and 100㎳/100 ㎳ of on/off pulsings were optimal pulse conditions from OES measurements and also XRD of deposited Ag film showed distinct change of (111) to (200) preferred orientation. These results were analysed in a view point of neutral gas heating and cooling by high power sputtering.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.179-179
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• 2011

관통전극(TSV, Trough Silicon Via) 기술은 전자부품의 소형화, 고성능화, 생산성 향상을 이룰 수 있는 기술이다. Cu는 현재 배선 기술에 적용되고 있고 전기적 저항이 낮아서 TSV filling 재료로 사용된다. 하지만 확산 방지막에 의해 완벽히 감싸지지 않는다면, Cu+은 빠르게 절연막을 통과하여 Si 웨이퍼로 확산된다. 이런 현상은 절연막의 누설과 소자의 오동작 등의 신뢰성 문제를 일으킬 수 있다. 현재 TSV의 제조와 열 및 기계적 응력에 관한 연구는 활발히 진행되고 있으나 Biased-Thermal Stress(BTS) 조건하의 Cu 확산에 관한 연구는 활발하지 않는 것이 실정이다. 이를 위해 본 연구에서는 TSV용 Cu 확산 방지막 Ti에 대해 Cu+의 drift 억제 특성을 조사하였다. 실험을 위해 Cu/확산 방지막/Thermal oxide/n-type Si의 평판 구조를 제작하였고 확산 방지막의 두께에 따른 영향을 조사하기 위해 Ti의 두께를 10 nm에서 100 nm까지 변화하였으며 기존 Cu 배선 공정에서 사용되는 확산 방지막 Ta와 비교하였다. 그리고 Cu+의 drift 측정을 위해 Biased-Thermal Stress 조건(Thermal stress: $275^{\circ}C$, Bias stress: +2MV/cm)에서 Capacitance 및 Timedependent dielectric breakdown(TDDB)를 측정하였다. 그 결과 Time-To Failure(TTF)를 이용하여 Cu+의 drift를 측정할 수 있었으며, 확산 방지막의 두께가 증가할수록 TTF가 증가하였고 물질에 따라 TTF가 변화하였다. 따라서 평판 구조를 이용한 본 실험의 Cu+의 drift 측정 방법은 향후 TSV 구조에서도 적용 가능한 방법으로 생각된다.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2018.06a
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• pp.80-80
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• 2018

실리콘 관통전극 (Through Silicon Via, TSV)는 메모리 칩을 적층하여 고밀도의 집적회로를 구현하는 기술로, 기존의 와이어 본딩 (Wire bonding) 기술보다 낮은 소비전력과 빠른 속도가 특징인 3차원 집적기술 중 하나이다. TSV는 일반적으로 도금 공정을 통하여 충전되는데, 고종횡비의 TSV에 결함 없이 구리를 충전하기 위해서 3종의 유기첨가제(억제제, 가속제, 평탄제)가 도금액에 첨가되어야 한다. 이러한 첨가제 중 결함 발생유무에 가장 큰 영향을 주는 첨가제는 평탄제이기 때문에, 본 연구에서는 이미다졸(imidazole) 계열, 이민(imine) 계열, 디아조늄(diazonium) 계열 및 피롤리돈(pyrrolidone) 계열과 같은 평탄제(leveler)의 작용기에 따라 TSV 충전 성능을 조사하였다. TSV 충전 시 관능기의 거동을 규명하기 위해 QCM (quartz crystal microbalance) 및 EQCM (electrochemical QCM)을 사용하여 흡착 정도를 측정하였다. 실험 결과, 디아조늄 계열의 평탄제는 TSV를 결함 없이 충전하였지만 다른 작용기를 갖는 평탄제는 TSV 내 결함이 발생하였다. QCM 분석에서 디아조늄 계열의 평탄제는 낮은 흡착률을 보이지만 EQCM 분석에서는 높은 흡착률을 나타내었다. 즉, 디아조늄 계열의 평탄제는 전기 도금 동안 전류밀도가 집중되는 TSV의 상부 모서리에서 국부적인 흡착을 선호하며 이로 인하여 무결함 충전이 달성된다고 추론할 수 있다.

• Investigative Magnetic Resonance Imaging
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• v.21 no.3
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• pp.192-194
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• 2017

Giant arachnoid granulations have been reported to be associated with headaches, which can be acute or chronic in presentation. In some cases, idiopathic intracranial hypertension, previously called pseudotumor cerebri, may occur. The pathophysiology of these enlarged structures seen as filling defects on imaging is not clearly defined, although they are presumed to cause symptoms such as headache via pressure resulting from secondary venous sinus obstruction. We present a unique presentation of secondary headache in a 39-year-old man with no prior history of headaches found to have giant arachnoid granulations, presenting as migraine with aura.

• Parasites, Hosts and Diseases
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• v.55 no.1
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• pp.65-69
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• 2017

A case of Taenia asiatica infection detected by small bowel series and colonoscopy is described. The patient was a 42-year-old Korean man accompanied by discharge of movable proglottids via anus. He used to eat raw pig liver but seldom ate beef. Small bowel series radiologic examinations showed flat tape-like filling defects on the ileum. By colonoscopy, a moving flat tapeworm was observed from the terminal ileum to the ascending colon. The tapeworm was identified as T. asiatica by mitochondrial DNA sequencing. The patient was prescribed with a single oral dose (16 mg/kg) of praziquantel.

• Journal of the Korean Society for Precision Engineering
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• v.17 no.2
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• pp.130-136
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• 2000

Generally, the build-up printed circuit board manufactured by the sequential process with etching, plating, drilling etc. requires many types of equipments and lead time. Etching process is suitable for mass production, however, it is not adequate for manufacturing prototype in the developing stage. In this study, we introduce a screen printing technology to prototyping a build-up printed circuit board. As for the material, photo/thermal curable resin and conductive paste are used for the formation of dielectric and conductor. The build-up structure is made by subsequent processes such as the formation of liquid resin thin layer, the solidification by UV/IR light, and via filling with conductive paste. By use of photo curable resin, productivity is greatly enhanced compared with thermal curable resin. Finally, the basic concept and the possibility of build-up printed circuit board prototyping are proposed in comparison with to the conventional process.

• Proceedings of the KIEE Conference
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• 2002.07c
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• pp.1933-1935
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• 2002

In this paper, we present a study of the structure and electro-optic behavior of hybrid liquid-crystal-silica sphere composite photonic crystals, formed by filling the (26% by volume) void space of fee (face centered cubic) silica opals infiltrated with a nematic liquid crystal. Three dimensional photonic crystals of visible range were fabricated via a self assembly method of silica spheres of submicron diameter. The expected fee structure was confirmed by scanning electron microscopy (SEM) of the dehydrated crystal with glass removed. The photonic crystal exhibited significant electric-field-induced shift of the optical Bragg reflection peak when the liquid crystal has the long molecular axis oriented parallel to the sphere surfaces.

• Journal of Sensor Science and Technology
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• v.21 no.1
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• pp.34-38
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• 2012

We have developed a cost effective test socket for ball grid array(BGA) integrated circuit(IC) packages using BeCu metal sheet as a test probe. The BeCu furnishes the best combination of electrical conductivity and corrosion resistance. The probe of the test socket was designed with a BeCu cantilever. The cantilever was designed with a length of 450 ${\mu}m$, a width of 200 ${\mu}m$, a thickness of 10 ${\mu}m$, and a pitch of 650 ${\mu}m$ for $11{\times}11$ BGA. The fabrication of the test socket used techniques such as through-silicon-via filling, bonding silicon wafer and BeCu metal sheet with dry film resist(DFR). The test socket is applicable for BGA IC chip.