• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.197-199
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• 2002

The invention of VHDL(Very High Speed Integrated Circuit Hardware Description Language), Technical language of Hardware, is a kind of turning point in digital circuit designing, which is being more and more complicated and integrated. Because of its excellency in expression ability of hardware, VHDL is not only used in designing Hardware but also in simulation for verification, and in exchange and conservation, composition of the data of designs, and in many other ways. Especially, It is very important that VHDL is a Technical language of Hardware standardized by IEEE, intenational body with an authority. The biggest problem in modern circuit designing can be pointed out in two way. One is a problem how to process the rapidly being complicated circuit complexity. The other is minimizing the period of designing and manufacturing to survive in a cutthroat competition. To promote the use of VHDL, more than a simple use of simulation by VHDL, it is requested to use VHDL in composing logical circuit with chip manufacturing. And, by developing the quality of designing technique, it can contribute for development in domestic industry related to ASIC designing. In this paper in designing SMPS(Switching mode power supply), programming PWM by VHDL, it can print static voltage by the variable load, connect computer to chip with byteblaster, and download in Max(EPM7064SLCS4 - 5)chip of ALTER. To achieve this, it is supposed to use VHDL in modeling, simulating, compositing logic and product of the FPGA chip. Despite its limit in size and operating speed caused by the specific property of FPGA chip, it can be said that this method should be introduced more aggressively because of its prompt realization after designing.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(5)
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• pp.5-8
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• 2001

In this paper, we have space vector PWM(Pulse Width Modulation) circuits on the FPGA(Field Programmable Gate Arry) chip designed by VHDL(Very high speed integrated circuit Hardware Description Language). This circuit parts was required at controlling the AC servo motor system and should have been designed with many discrete digital logics. In the result of this study, peripheral circuits are to be simple and the designed logic terms are robust and precise. Because of it's easy verification and implementation, we could deduced that the customize FPGA chip show better performance than that of circuit modules parts constituted of discrete IC.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(5)
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• pp.135-138
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• 2001

This paper presents micro step driving method using VHDL(Very high speed integrated circuit Hardware Description Language) which can configure CPLD(Complex Programmable Logic Device). Using VHDL which can do abstractive programming is similar to high level language. The whole block divided into five parts with freq. divide part, saw-tooth wave generation part, sine-cosine wave generation part, comparative part, out part. In the result of this study, peripheral circuits are to be simple and using LPM(Library of Parameterized Modules) is more easily to configure circuit. It is easy to verify and implement by using VHDL. To subdivide one natural step, we confirm that using micro step driver is expected that the rotor motion is stepless very smooth.

• Journal of Power Electronics
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• 제12권6호
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• pp.974-981
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• 2012

A FPGA based delta modulated single phase matrix converter has been developed that may be used in both cyclo-converters and cyclo-inverters. This converter is ideal for variable speed electrical drives, induction heating, fluorescent lighting, ballasts and high frequency power supplies. The peripheral input-output and FPGA interfacing have been developed through Xilinx 9.2i, to generate delta modulated trigger pulses for the converter. The controller has been relieved of the time consuming computational task of PWM signal generation by implementing the method of trigger pulse generation in a FPGA by using Hardware Description Language VHDL in Xilinx. The trigger circuit has been tested qualitatively by observing various waveforms on an oscilloscope. The operation of the proposed system has been found to be satisfactory.

• 한국지능시스템학회:학술대회논문집
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• 한국퍼지및지능시스템학회 1993년도 Fifth International Fuzzy Systems Association World Congress 93
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• pp.925-928
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• 1993

In this paper the caracteristics of the fuzzy flip-flop which was proposed as a fuzzy sequential circuit is firstly mentioned. Secondly the circuit construction of typical fuzzy flip-flip circuits using VHDL (Very high speed integrated circuit Hardware Description Language) compiler and simulator is presented. Finally the possibility of the application of the fuzzy sequential circuit will be mentioned.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2002년도 전력전자학술대회 논문집
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• pp.657-660
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• 2002

In this paper, the FFT processor for power measurement using VHDL (Very high-speed integrated circuit Hardware Description Language) is discussed. The proposed system relies on the FFT algorithm to compute real and reactive power. The advantage of system is that harmonic analysis is carried out on a period of the Input signal. The proposed system is based on FFT Processor which is designed using VHDL. In the design of FFT processor, $radix-2^2$ is adopted to reduce several complex multipliers for twiddle factor. And this processor adopt pipeline structure. Therefore, the system Is able to have both high hardware efficiency and high performance.

• 한국정보과학회논문지:컴퓨팅의 실제 및 레터
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• 제5권2호
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• pp.196-208
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• 1999

본 논문에서는 시뮬레이션 속도 향상을 위하여 VHDL(Very high speed integrated circuit Hardware Description Language)로 기술된 디지털 회로 시뮬레이션을 위한 병렬 분산 VHDL 시뮬레이터(Parallel Distributed VHDL Simulator : PDVS)를 개발한다. 개발된 프로그램을 대규모 병렬 프로그래밍 환경에서도 수행될 수 있도록 하기 위해서 표준 통신 라이브러리인 MPI(Message Passing Interface)를 이용하여 구현된다. PDVS 의 전체적인 시스템구성도, PDVS 에 사용된 시뮬레이션 프로토콜, 전역가상시간 계산 메카니즘 및 논리적 프로세스의 내부 구성요소들간의 관계와 PDVS의 제어 흐름도를 제시한다. 그리고 본 연구에서는 병렬 분산 시뮬레이션의 병렬성 정도를 분석하기 위하여 디지털 회로의 크기 변화와 처리되는 사건수(grain size)의 변화에 따른 성능 결과를 제시한다. 이 연구에서 4배크기의 디지털 회로를 적용한 경우는 프로세서를 12개 사용할 때에 8배의 속도향상을 얻었다. 그리고 처리되는 사건의 수가 200인 경우는 프로세서를 32개 사용할 때에 12배의 속도향상을 얻었다. 또한 동일한 방법을 SGI Origin 2000, Cray T3e 및 IBM SP2에 적용함으로서 그 성능의 간접적인 비교결과도 제시한다.

• 전자공학회논문지B
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• 제33B권2호
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• pp.103-110
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• 1996

In this paper, we propose a unified systolic array for the computation of the 2D discrete cosine transform/discrete sine transform/discrete hartley transform (DCT/DST/DHT). The unified systeolic array for the 2D DCT/DST/DHT is a generalization of the unified systolic array for the 1D DCT/DST/DHT. In order to calculate the 2D transform, we compute 1D transforms along the row, transpose them, and obtain 1D transforms along the column. When we compare the proposed systolic array with the conventional method, our architecture exhibits a lot of advantages in terms of latency, throughput, and the number of PE's. The simulation results using very high speed integrated circuit hardware description language (VHDL), international standard language for hardware description, show the functional validity of the proposed architecture.

• Journal of Advanced Marine Engineering and Technology
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• 제25권2호
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• pp.375-382
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• 2001

In this study, an adapted Turbo Coding Algorithm for reducing communication error of a fire detection system for marine vessels, especially image transmission via power lone. Because it is necessary that this system communicate larger and faster than previous method, this study carried out enhancement a decoding speed by adaptation CRC with Turbo Code Algorithm, improvement of metric method, and reduction of decoding delay by using of Center-to-Top method. And the results are as follows: (1) Confirmed that a Turbo Code is so useful methods for reducing communication error in lots of noise environments. (2)Proposed technology in this study speed increasing method of Turbo Coding Algorithm proves 2 times faster than normal Turbo Code and communication error reducing as well in the board made by VHDL software & chips ALTERA company.

• Journal of information and communication convergence engineering
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• 제5권4호
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• pp.351-357
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• 2007

SRM (Switched Reluctance Motor) has not been put into practical use since it has been developed in mid 19th centuries, but the switching element using semi-conductor was developed in 1950's which made possible to produce small size staffing motors. The research activities have been lively conducted regarding SRM since 1960's, nowadays, more research activities are being carried out focusing on developing small home appliances such as vacuum cleaners and washing machines. This thesis explains the study of controller design applied to SRM concept. This controller executes controller algorithms via $\mu$ - processor to increase stability and precise measurement, and VHDL (Very high speed integrated circuit Hardware Description Language) is designed to generate SRM driving signal.