• Title/Summary/Keyword: Verification Software

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FAULT TREE ANALYSIS OF KNICS RPS SOFTWARE

  • Park, Gee-Yong;Koh, Kwang-Yong;Jee, Eunk-Young;Seong, Poong-Hyun;Kwon, Kee-Choon;Lee, Dae-Hyung
    • Nuclear Engineering and Technology
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    • v.40 no.5
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    • pp.397-408
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    • 2008
  • This paper describes the application of a software fault tree analysis (FTA) as one of the analysis techniques for a software safety analysis (SSA) at the design phase and its analysis results for the safety-critical software of a digital reactor protection system, which is called the KNICS RPS, being developed in the KNICS (Korea Nuclear Instrumentation & Control Systems) project. The software modules in the design description were represented by function blocks (FBs), and the software FTA was performed based on the well-defined fault tree templates for the FBs. The SSA, which is part of the verification and validation (V&V) activities, was activated at each phase of the software lifecycle for the KNICS RPS. At the design phase, the software HAZOP (Hazard and Operability) and the software FTA were employed in the SSA in such a way that the software HAZOP was performed first and then the software FTA was applied. The software FTA was applied to some critical modules selected from the software HAZOP analysis.

End-mill Manufacturing and Developing of Processing Verification via Cutting Simulation (Cutting Simulation을 이용한 End-milling Cutter의 제작 및 가공 검증 기술 개발)

  • Kim J.H.;Kim J.H.;Ko T.J.;Park J.W.;Kim H.S.
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2006.05a
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    • pp.453-454
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    • 2006
  • This paper describes a processing verification technique for developing about end-milling cutters. Developed software is processing verification module for manufacturing. By using cutting simulation method, we can obtain center points of finding wheel via Boolean operation between a grinding wheel and a cylindrical workpiece. The obtained CL data can be used for calculating NC data. After then, we can simulate by using designed grinding machine and NC data. This research has been implemented on a commercial CAD system by using the API function programming. The operator can evaluate the cutting simulation process and reduce the time of design and manufacturing.

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A Study on Verification of NC Code of Multi-spindles Drilling for Tube Sheet in Heat Exchanger (열교환기 Tube Sheet의 다축드릴가공 검증에 관한 연구)

  • Oh, Byeong-Hwan;Lee, Hui-Gwan;Yang, Gyun-Ui
    • Journal of the Korean Society for Precision Engineering
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    • v.18 no.2
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    • pp.79-83
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    • 2001
  • A verification of multi-spindles drilling NC data is presented. The drilling of multi-spindles can offer productivity over three times as fast as that of single spindle. The most important things in machining tube sheet are precision of hole position and machining time. The drilling of multi-spindles has difficulties in controlling many motors to drive spindles and assign a correspondent number to each spindles. Multi-spindles drilling has different codes from CNC milling ; many subroutines, assignment of spindle, and so on. The conventional method, which inspects the NC code of the drilling, is to drill holes on a thin plate or tube sheet previously. The method results in low productivity because it consumed long machining time and welding for correction. This paper describes details of multi-spindles NC code and operation of multi-spindles drilling machine. A verification software of the multi-spindles drilling NC code is developed on the details.

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Mathematical Verification of A Nuclear Power Plant Protection System Function With Combined CPN and PVS

  • Koo, Seo-Ryung;Son, Han-Seong;Seong, Poong-Hyun
    • Proceedings of the Korean Nuclear Society Conference
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    • 1998.05a
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    • pp.315-320
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    • 1998
  • In this work, an automatic software verification method for Nuclear Power Plant (NPP) protection system is developed. This method utilizes Colored Petri net (CPN) for modeling and Prototype Verification system (PVS) for mathematical verification. In order to help flow-through from modeling by CPN to mathematical proof by PVS, a translator has been developed in this work. The combined method has been applied to a protection system function of Wolsong NPP SDS2(Steam Generator Low Level Trip)and found to be promising for further research and applications.

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Bottom-up Composition and Verification of Embedded Software (내장형 소프트웨어 컴포넌트의 상향식 합성과 검증)

  • Choi, Yun-Ja
    • The KIPS Transactions:PartD
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    • v.17D no.6
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    • pp.415-422
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    • 2010
  • This paper proposes service-oriented composition and verification techniques for incrementally extracting high-level abstract behavior of unit components in a systematic manner. Proposed techniques include the definition for abstract component, which is a basic building-block of the abstraction process, an algorithm for port-based synchronized abstraction, and projection abstraction. A verification framework is developed using the proposed techniques and its efficiency is demonstrated through a case example.

Introduction to Verification Test Environment of FSW in KOMPSAT-2 (다목적실용위 성 2호에서의 탑재소프트웨어 검증시험환경)

  • Lee, Jae-Seung;Park, Sung-Woo;Park, Hee-Sung;Lim, Jeong-Heum
    • Annual Conference of KIPS
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    • 2003.05b
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    • pp.1197-1200
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    • 2003
  • 위성의 개발 및 제작에는 많은 비용과 기간이 소요되며, 일반적으로 사용되는 장비들과는 전혀 다른 우주환경에서 임무를 수행하게된다. 위성의 성공적인 임무완수를 위해서는 철저한 사전검증 작업들이 필요하게 된다. 특히, 위성의 궤도, 자세를 제어하고 실제적인 임무수행을 관할하는 위성탑재소프트웨어에 대한 완벽한 검증이 필요하다. 2004년 발사를 목표로 하고있는 다목적실용위성 2호 FSW(Flight Software)의 개발단계에서 소프트웨어의 통합 및 시험, 검증시험을 위해 실제 위성시스템과 유사한 인터페이스를 제공하는 개발도구인 STB(Software Test Bed)가 제작되었으며, 제작된 STB를 통한 FSW의 검증시험 및 분석을 지원하기 위한 프로그램으로서 구문분석 프로그램을 이용한 VTSP(Verification Test Script Parser)의 개발이 이루어졌다. 본 논문에서는 이러한 STB와 VTSP에 대한 전반적인 소개와 함께 개발된 STB와 VTSP를 이용하여 실제 위성탑재소프트웨어를 검증하기 위한 시험환경에 대해 알아보고자 한다.

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Input File Based Dynamic Symbolic Execution Method for Software Safety Verification (소프트웨어 안전성 검증을 위한 입력 파일 기반 동적 기호 실행 방법)

  • Park, Sunghyun;Kang, Sangyong;Kim, Hwisung;Noh, Bongnam
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.27 no.4
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    • pp.811-820
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    • 2017
  • Software automatic technology research recently focuses not only on generating a single path test-case, but also on finding an optimized path to reach the vulnerability through various test-cases. Although Dynamic Symbolic Execution (DSE) technology is popular among these automatic technologies, most DSE technology researches apply only to Linux binaries or specific modules themselves. However, most software are vulnerable based on input files. Therefore, this paper proposes an input file based dynamic symbolic execution method for software vulnerability verification. As a result of applying it to three kinds of actual binary software, it was possible to create a test-case effectively reaching the corresponding point through the proposed method. This demonstrates that DSE technology can be used to automate the analysis of actual software.

A Design and Implementation of MCC Test Cases Generator using Binary Numbers (2진수를 활용한 MCC 테스트 케이스 생성기 설계 및 구현)

  • Robin Lee;Young Ho Nam
    • Smart Media Journal
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    • v.13 no.8
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    • pp.9-15
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    • 2024
  • Software testing is essential in the software development process. Modified Condition / Decision Coverage (MC/DC) is a test case derivation technique that enhances the stability and reliability of software by effectively verifying complex conditions and decision structures. We propose the MCC Test Cases (MTC) generator in this study. This generator generates Multiple Condition Coverage (MCC) test cases using binary numbers to confirm the maximum coverage value of MC/DC testing. The proposed MTC generator utilizes some conditions from the Traffic Alert and Collision Avoidance System (TCAS)-II specification. It converts them into a Comma-Separated Values (CSV) file and then validates the coverage results through the VectorCAST program. So, MC/DC testing was performed using the MCC test case to confirm the maximum coverage value when performing MC/DC tests for each condition of the TCAS-II specification. This research is helpful for the verification of MC/DC test cases by confirming the maximum coverage value when performing MC/DC tests. Moreover, having more test cases increases the likelihood of discovering defects. Therefore, it can improve the efficiency of software test coverage verification, as well as the quality and stability of software.

For the development of software industry, extensive software certification scheme (소프트웨어 산업의 발전을 위한 확장된 소프트웨어 인증체계)

  • Seo, Hee Suk;Kim, Sang Ho;Lee, Seung Jae
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.6 no.3
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    • pp.121-129
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    • 2010
  • For the development of software industry, offers an expanded software authentication scheme caused by the unauthorized copying of software is to reduce the damage to software developers, retail sales and to promote the development of the software industry was studied. Serial Number of the current software registration is conducted in such a simple verification procedure if the Serial Number only illegal and can be installed on multiple computers, such as program code to allow third parties to enter the Serial Number, or the extract can be used without is a reality. The proposed extension to the software authentication system when you install the software, my phone authentication and MAC Address Authentication Service introduced to distinguish normal user, the user of the MAC Address of the server and software development company that was sent to the registered MAC Address of the computer to be run only by the use of genuine software and to make unauthorized copies of software generated by the software developer can reduce the damage of the proposed plan.

Verification and Verification Method of Safety Class FPGA in Nuclear Power Plant (원자력발전소의 안전등급 FPGA 확인 및 검증 방법)

  • Lee, Dongil
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2019.05a
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    • pp.464-466
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    • 2019
  • Controllers used in nuclear power plants require high reliability. A controller including a Field Programmable Gate Array (FPGA) and a Complex Programmable Logic Device (referred to hereinafter as FPGA) has been applied to many Nuclear Power Plants (NPP) in the past, including the APR1400 (Advanced Power Reactor 1400), a Korean digital nuclear power plant. Initially, the FPGA was considered as a general IC (Integrated Circuit) and verified only by device verification and performance testing. In the 1990s, research on FPGA verification began, and until the FPGA became a chip, it was regarded as software and the software Verification and Validation (V&V) using IEEE 1012-2004 was implemented. Currently, IEC 62566, which is a European standard, has been applied for a lot of verification. This method has been evaluated as the most sensible method to date. This is because the method of verifying the characteristics of SoC (System on Chip), which has been a problem in the existing verification method, is sufficiently applied. However, IEC 62566 is a European standard that has not yet been adopted in the United States and maintains the application of IEEE 1012 for FPGA. IEEE 1012-2004 or IEC 62566 is a technical standard. In practice, various methods are applied to meet technical standards. In this paper, we describe the procedure and important points of verification method of Nuclear Safety Class FPGA applying SoC verification method.

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