• Title/Summary/Keyword: Vector-Processor

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Simplified SVPWM that Integrates Overmodulation and Neutral Point Potential Control

  • Zhu, Rong-Wu;Wu, Xiao-Jie
    • Journal of Power Electronics
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    • v.14 no.5
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    • pp.926-936
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    • 2014
  • A simplified and effective space vector pulse-width modulation (SVPWM) algorithm with two and three levels for three-phase voltage-source converters is proposed in this study. The proposed SVPWM algorithm only uses several linear calculations on three-phase modulated voltages without any complicated trigonometric calculations adopted by conventional SVPWM. This simplified SVPWM also avoids choosing the vector sector required by conventional SVPWM. A two-level overmodulation scheme is integrated into the proposed two-level SVPMW to generate the output voltage that increases from a linear region to a six-step state with a smoothly linear transition characteristic and a simple overmodulation process without a lookup table and complicated nonlinear functions. The three-level SVPWM with a proportional-integral controller effectively balances the neutral point potential of the neutral point clamped converter. Results from the simulation in MATLAB/Simulink and the experiment based on a digital signal processor are provided to clearly demonstrate the validity and effectiveness of the proposed strategies.

Design of High-Response Speed Control System for AC Servomotor Drive (유도형 교류 서보전동기의 고응답 구동회로 설계에 관한 연구)

  • 성영권;조철제
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.41 no.5
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    • pp.474-482
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    • 1992
  • This paper describes the speed control system of an induction type ac servomotor drive on the vector control basis of slip frequency and constant secondary flux control for a quick torque response. The system is composed of a digital controller using a SCB-V50 microprocessor and a PWM inverter with power MOSFETs for high speed switching. And, for the measurement of actual instantaneous currents, MDCS A070-051 hall sensors are employed. The rising time of step responce by this system through the test of a 600[W] ac servomotor is 30[ms]. Overall experimental result shows that the drive performance of the system is similar to that of a separately excited armature current control of a dc motior.

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Dynamic Characteristic Analysis of LIM Using Coupled FEM and Control Algorithm (유한요소법(FEM)과 제어알고리즘이 결합된 기법을 이용한 선형 유도전동기(LIM)의 동특성 해석)

  • Jeon, Su-Jin;Park, Seong-June;Lee, Junn-Ho
    • Proceedings of the KIEE Conference
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    • 2005.07b
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    • pp.1086-1088
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    • 2005
  • It is necessary to modify the state-of-the-art of vector control theory, because of the phase asymmetry(static end effect) in the Linear Induction Motor(LIM). The dynamic characteristic analysis method of the vector controlled LIM using coupled FEM and control algorithm taking into account the movement is proposed. The focus of this paper is the analysis relative to phenomena of static end effect due to the motor structure. To prove the propriety of the proposed method, the Digital Signal Processor(DSP) installed experimental devices are equipped and the experiment is performed.

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Speed Field orient control of permanent magnet linear motor according to determination of system rate. (직선형 영구 자석 동기 모터의 시스템 정격 선정에 따른 속도 제어 특성)

  • Jang, Seok-Myeong;You, Dae-Joon;Jang, Won-Bum;Yang, Moon-Sub
    • Proceedings of the KIEE Conference
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    • 2005.07b
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    • pp.1273-1275
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    • 2005
  • This paper presents design of speed control system for slot less iron-cored PM linear synchronous motor using space vector PWM. the design must be considered by the useable limits of the DC link voltage and dynamic operating rage as well as the characteristics of design parameters in a point of system. Therefore, in this paper, the permissible operating range of manufactured motor by determination of rate speed and rate thrust according to switching scheme of DC link voltage are offered. The vector control requires information about rotor position. And we can need to the Hall sensor for sampling current. In order to agree with this purpose, Digital Signal Processor(TMS320F240x) developed for implementation of a speed Field Oriented Control.

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Implementation of Speech Recognizer using DSP(Digital Signal Processor) (DSP를 이용한 음성인식기 구현)

  • 임창환;문철홍;전경남
    • Proceedings of the IEEK Conference
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    • 2000.11d
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    • pp.187-190
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    • 2000
  • In this paper, implementation of speech Recognizer system, Separated from Personal computer. By using DSP, this intends to extend the voice recognizing, limited into PC because of amount of data and calculations. For this performance The thesis uses the real time End point detector and organizes no additional device between human and the system, characteristic vector are that detects End point and voice from absolute energy and ZCR, that uses 12 difference Cepstrum from LPC, that uses the method to compensate the process of pattern separating and pre-calculated standard pattern limitation.

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A two-dimensional positioning system suitable for noisy environment

  • Kashiwagi, Hiroshi;Sakata, Masato;Ohtomo, Atsushi
    • 제어로봇시스템학회:학술대회논문집
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    • 1990.10b
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    • pp.1196-1199
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    • 1990
  • The authors proposed a new two-dimensional(2D) positioning system by use of M-array suitable for noisy environment in '88KACC and its revised version in '89KACC. This 2D positioning system is further improved to be used in practice; the computation time is improved by use of vector signal processor and the focussing process is improved by use of an electrically controlled zoom lense. It is shown that this system is robust to noise and also to misalignment of devices.

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Associative Memories for 3-D Object (Aircraft) Identification (연상 메모리를 사용한 3차원 물체(항공기)인식)

  • 소성일
    • Information and Communications Magazine
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    • v.7 no.3
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    • pp.27-34
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    • 1990
  • The $(L,\psi)$ feature description on the binary boundary air craft image is introduced of classifying 3-D object (aircraft) identification. Three types for associative matrix memories are employed and tested for their classification performance. The fast association involved in these memories can be implemented using a parallel optical matrix-vector operation. Two associative memories are based on pseudoinverse solutions and the third one is interoduced as a paralell version of a nearest-neighbor classifier. Detailed simulation results for each associative processor are provided.

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Programming Model for SODA-II: a Baseband Processor for Software Defined Radio Systems (SDR용 기저대역 프로세서를 위한 프로그래밍 모델)

  • Lee, Hyun-Seok;Yi, Joon-Hwan;Oh, Hyuk-Jun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.7
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    • pp.78-86
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    • 2010
  • This paper discusses the programming model of SODA-II that is a baseband processor for software defined radio (SDR) systems. Signal processing On-Demand Architecture Ⅱ (SODA-II) is an on-chip multiprocessor architecture consisting of four processor cores and each core has both an wide SIMD datapath and a scalar datapath. This architecture is appropriate for baseband processing that is a mixture of vector computations and scalar computations. The programming model of the SODA-II is based on C library routines. Because the library routines hide the details of complex SIMD datapath control procedures, end users can easily program the SODA-II without deep understanding on its architecture. In this paper, we discuss the details of library routines and how these routines are exploited in the implementation of baseband signal processing algorithms. As application examples, we show the implementation result of W-CDMA multipath searcher and OFDM demodulator on the SODA-II.

An Implementation of Real-Time SONAR Signal Display System using the FPGA Embedded Processor System (FPGA 임베디드 프로세서 시스템을 사용한 실시간 SONAR 선호 디스플레이 시스템의 구현)

  • Kim, Dong-Jin;Kim, Dae-Woong;Park, Young-Seak
    • Journal of the Institute of Convergence Signal Processing
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    • v.12 no.4
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    • pp.315-321
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    • 2011
  • The CRT monitor display system for SONAR signal that are commonly used in ships or naval vessels uses vector scanning method. Therefore the processing circuits of the system is complex. Also because production had been shut down, the supply of parts is difficult as well as high-cost. FPGA -based embedded processor system is flexible to adapting to various applications because it makes simple processing circuits and its core is easily reconfigurable, and provides high speed performance in low-cost. In this paper, we describe an implementation of SONAR signal LCD display system using the FPGA embedded processor system to overcome some weakness of existing CRT system. By changing X-Y Deflection and CRT control blocks of current system into FPGA embedded processor system, our system provides the simplicity, flexibility and low-cost of system configuration, and also real-time acquisition and display of SONAR signal.

The Design of VGE(Vector Geometry Engine) for 3D Graphics Geometry Processing (3차원 그래픽 지오메트리 연산을 위한 벡터 지오메트리 엔진의 설계.)

  • 김원석;정철호;한탁돈
    • Journal of KIISE:Computer Systems and Theory
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    • v.31 no.1_2
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    • pp.135-143
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    • 2004
  • 3D Graphics accelerator is usually composed of two parts, geometry engine and rasterizer. In this paper, VGE(Vector Geometry Engine) which exploits vertex-level parallelism is proposed. In VGE, Common Floating-Point Unit by adding four-FADD, four-FMUL unit and 128-vector register accelerates geometry calculation. In comparison with SH4, Performance result show that the VGE can achieve performance gain over 4.7 times. To evaluate VGE performance, we make simulator to rebuild Simple-Scalar, general purpose processor simulator. In simulator model, we use Viewperf-benchmark.