• Title/Summary/Keyword: Vector Graphics

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A Design of 2D Vector Graphics Accelerator with a Modified Scan-line Edge flag Algorithms including Clipping and Super Sampling (클리핑과 슈퍼샘플링을 포함한 스캔라인 엣지 플래그 방식의 2D 벡터 그래픽 가속기 설계)

  • Lee, Kwang-Yeob
    • Journal of IKEEE
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    • v.12 no.2
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    • pp.124-130
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    • 2008
  • Vector Graphics describes an image with mathematical statements instead of pixel information. Which enables easy scalability without loss in image quality and usually results in a much smaller file size compared with bitmap images. In this paper, we propose Vector Graphics Accelerator for mobile device with scan-line edge flag algorithm to render vector image without sorting process of edge. Proposed Vector Graphics Accelerator was verified with OpenVG 2D Vector image. The estimated processing time of proposed Accelerator with Tiger image is 12ms on Tessellation process, and total rendering time is 208ms. Estimated rendering performance with Tiger image is about 5 frame per second

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Development of a Vector Graphics Kernel for Mobile Communication Terminals (모바일 통신 단말기를 위한 벡터 그래픽스 커널 개발)

  • Lee Hwan-Yong;Park Kee-Hyun;Woo Jong-Jung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.6
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    • pp.1011-1018
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    • 2006
  • Due to rapid development of mobile communication terminals and various requests of their users, multimedia information including image information has been the basis of mobile communication contents. In order to use vectored image information efficiently, which is more favorable than bit-mapped image information when transmission delay time and costs are considered, efficient vector graphics supporting systems are needed. Therefore, vector graphics kernel systems have been proposed and standardization attempts have been made in order to increase interoperability. In this paper, a vector graphics kernel based on OpenVG is designed and implemented. OpenVG was proposed as a standard vector graphics kernel by Khronos Group recently. The implemented vector graphics kernel, named by alexVG, is developed on a PC emulator as well as on a development board equipped with an ARM processor. In addition, performance tests are made in order to verify its functions.

A Design of 2D Vector Graphics Rasterizer with a Modified Scan-line Edge flag Algorithms for Mobile Device (모바일 기기를 위한 스캔라인 엣지 플래그 방식의 2D 벡터 그래픽 레스터라이저 설계)

  • Park, Jeong-Hun;Lee, Kwang-Yeob;Jeong, Tae-Ui
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.05a
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    • pp.298-301
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    • 2008
  • Vector Graphics describes an image with mathematical statements instead of pixel information, Which enables easy scalability without loss in image quality and usually results in a much smaller file size compared with bitmap images. In this paper, we propose Vector Graphics Rasterizer for mobile device with scan-line edge flag algorithm. Proposed Vector Graphics Accelerator was verified with OpenVG 2D Vector image. The estimated performance of proposed Accelerator is 5 frame per second with Tiger image.

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Design of Open Vector Graphics Accelerator for Mobile Vector Graphics (모바일 벡터 그래픽을 위한 OpenVG 가속기 설계)

  • Kim, Young-Ouk;Roh, Young-Sup
    • Journal of Korea Multimedia Society
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    • v.11 no.10
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    • pp.1460-1470
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    • 2008
  • As the performance of recent mobile systems increases, a vector graphic has been implemented to represent various types of dynamic menus, mails, and two-dimensional maps. This paper proposes a hardware accelerator for open vector graphics (OpenVG), which is widely used for two-dimensional vector graphics. We analyze the specifications of an OpenVG and divide the OpenVG into several functions suitable for hardware implementation. The proposed hardware accelerator is implemented on a field programmable gate array (FPGA) board using hardware description language (HDL) and is about four times faster than an Alex processor.

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A Design of a Mobile Graphics Accelerator based on OpenVG 1.0 API

  • Kwak, Jae-Chang;Lee, Kwang-Yeob
    • Journal of information and communication convergence engineering
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    • v.6 no.3
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    • pp.289-293
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    • 2008
  • In this paper, we propose the hardware architecture to accelerate 2D Vector graphics process for mobile devices. we propose the Transformation Unit Architecture that considerates the operation dependency. It has 3 cycles excution time and uses 2 multipliers and 2 adders. Proposed paint generation unit uses a LUT method, so it does not execute color interpolation which needs to be calculated every time. The proposed OpenVG 1.0 Accelerator achieved a 2.85 times faster performance in a tiger model.

CONVERTING BITMAP IMAGES INTO SCALABLE VECTOR GRAPHICS

  • Zhou, Hailing;Zheng, Jianmin;Seah, Hock Soon
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2009.01a
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    • pp.435-440
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    • 2009
  • The scalable vector graphics (SVG) standard has allowed the complex bitmap images to be represented by vector based graphics and provided some advantages over the raster based graphics in applications, for example, where scalability is required. This paper presents an algorithmto convert bitmap images into SVG format. The algorithm is an integration of pixel-level triangulation, data dependent triangulation, a new image mesh simplification algorithm, and a polygonization process. Both triangulation techniques enable the image quality (especially the edge features) to be preserved well in the reconstructed image and the simplification and polygonization procedures reduce the size of the SVG file. Experiments confirm the effectiveness of the proposed algorithm.

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A Design of 3D Graphics Lighting Processor for Mobile Applications (휴대 단말기용 3D Graphics Lighting Processor 설계)

  • Yang, Joon-Seok;Kim, Ki-Chul
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.837-840
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    • 2005
  • This paper presents 3D graphics lighting processor based on vector processing using pipeline chaining. The lighting process of 3D graphics rendering contains many arithmetic operations and its complexity is very high. For high throughput, proposed processor uses pipelined functional units. To implement fully pipelined architecture, we have to use many functional units. Hence, the number of functional units is restricted. However, with the restricted number of pipelined functional units, the utilization of the units is reduced and a resource reservation problem is caused. To resolve these problems, the proposed architecture uses vector processing using pipeline chaining. Due to its pipeline chaining based architecture, it can perform 4.09M vertices per 1 second with 100MHz frequency. The proposed 3D graphics lighting processor is compatible with OpenGL ES API and the design is implemented and verified on FPGA.

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SVG를 이용한 지리정보 활용에 대한 연구

  • 김희원
    • Proceedings of the Korean Association of Geographic Inforamtion Studies Conference
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    • 2003.11a
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    • pp.15-20
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    • 2003
  • As an emerging technology in Computer graphics areas, SVG(Scalable Vector Graphic) makes it possible to make use of Vector graphics for servicing maps in basic internet browsing environment. SVG based thematic map Internet GIS system implemented by this research is free of special server side GIS mapping system and client side extra technology. It provides high-quality vector map which can interact with the user, template map which can be used for other purpose, glance the future map based on Webservices technologies. Many good characteristics of SVG in mapping at computer screen and reusability of SVG document provide new era of visualzation of geographic information.

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Implementation and Performance Evaluation of Vector based Rasterization Algorithm using a Many-Core Processor (매니코어 프로세서를 이용한 벡터 기반 래스터화 알고리즘 구현 및 성능평가)

  • Shon, Dong-Koo;Kim, Jong-Myon
    • IEMEK Journal of Embedded Systems and Applications
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    • v.8 no.2
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    • pp.87-93
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    • 2013
  • In this paper, we implemented and evaluated the performance of a vector-based rasterization algorithm of 3D graphics using a SIMD-based many-core processor that consists of 4,096 processing elements. In addition, we compared the performance and efficiency of the rasterization algorithm using the many-core processor and commercial GPU (Graphics Processing Unit) system which consists of 7 GPUs and each of which have 512 cores. Experimental results showed that the SIMD-based many-core processor outperforms the commercial GPU system in terms of execution time (3.13x speedup), energy efficiency (17.5x better), and area efficiency (13.3x better). These results demonstrate that the SIMD-based many-core processor has potential as an embedded mobile processor.

Rendering of Sweep Surfaces using Programmable Graphics Hardware (그래픽스 하드웨어를 이용한 스윕 곡면의 렌더링)

  • Ko, Dae-Hyun;Yoon, Seung-Hyun;Lee, Ji-Eun
    • Journal of the Korea Computer Graphics Society
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    • v.16 no.4
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    • pp.11-16
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    • 2010
  • We present an efficient algorithm for rendering sweep surfaces using programmable graphics hardware. A sweep surface can be represented by a cross-section curve undergoing a spline motion. This representation has a simple matrix-vector multiplication structure that can easily be adapted to programmable graphics hardware. The data for the motion and cross-section curves are stored in texture memory. The vertex processor considers a pair of surface parameters as a vertex and evaluates its coordinates and normal vector with a single matrix multiplication. Using the GPU in this way is between 10 and 40 times as fast as CPU-based rendering.