• ETRI Journal
• /
• 제37권4호
• /
• pp.772-779
• /
• 2015

This paper presents a power-efficient hardware realization for a motion estimation technique that is based on the full-search block matching algorithm (FSBMA). The considered input is the quarter common intermediate format of digital video. The mean of absolute difference (MAD) is the distortion criteria employed for the block matching process. The conventional architecture considered for the hardware realization of FSBMA is that of the shift register-based 2-D systolic array. For this architecture, a conservative approximation technique is adapted to eliminate unnecessary MAD computations involved in the block matching process. Upon introducing the technique to the conventional architecture, the power and complexity of its implantation is reduced, while the accuracy of the motion vector extracted from the block matching process is preserved. The proposed architecture is verified for its functional specifications. A performance evaluation of the proposed architecture is carried out using parameters such as power, area, operating frequency, and efficiency.

• 정보처리학회논문지A
• /
• 제16A권6호
• /
• pp.411-418
• /
• 2009

퍼지 클러스터링 기반 벡터 양자화 알고리즘은 퍼지 클러스터링 분석이 벡터 양자화 프로세스 초기단계에서 초기화에 덜 민감하게 하기 때 문에 데이터 압축 분야에서 널리 사용되어 왔다. 하지만, 퍼지 클러스터링 처리는 훈련 벡터 공간에 포함된 불확실한 양적 공식의 복잡한 프레 임워크 때문에 상당한 계산량이 요구된다. 이러한 상당한 계산량 부하를 극복하기위해 본 논문은 4,096 프로세싱 엘리먼트로 구성된 어레이 아 키텍처를 이용하여 퍼지 벡터 양자화 알고리즘의 병렬 구현을 제안한다. 제안하는 병렬 구현은 4,096 프로세싱 엘리먼트를 이용하여 클러스터 링 프로세스 동안 효과적인 벡터 할당 정책을 적용함으로써 계산적으로 효율적인 솔루션을 제공한다. 모의실험 결과, 제안한 병렬 구현은 기존 의 다른 어레이 아키텍처를 이용한 구현보다 성능 및 효율 측면에서 상당한 향상을 보였다. 또한동일한 130nm 기술에서 제안한 병렬 구현은 오늘날의 ARM이나 TI DSP 프로세서를 이용한 구현과 비교하여 약 1000배의 성능 향상 및 100배의 에너지 효율 향상을 보였다. 이 결과들은 향상된 성능 및 에너지효율에서 제안한 병렬 구현의 잠재가능성을 입증한다.

• 로봇학회논문지
• /
• 제1권2호
• /
• pp.197-202
• /
• 2006

We present the synergy effect of humanoid robot walking down on a slope and support vector machines in this paper. The biped robot architecture is highly suitable for the working in the human environment due to its advantages in obstacle avoidance and ability to be employed as human substitutes. But the complex dynamics in the robot and ground makes robot control difficult. The trajectory of the zero moment point (ZMP) in a biped walking robot is an important criterion used for the balance of the walking robots. The ZMP trajectory as dynamic stability of motion will be handled by support vector machines (SVM). Three kinds of kernels are also employed, and each result from these kernels is compared to one another.

• 전자공학회논문지B
• /
• 제32B권11호
• /
• pp.153-162
• /
• 1995

When vector quantization is used in low rate image coding (e.g., R<0.5), the primary problem is the tremendous computational complexity which is required to search the whole codebook to find the closest codevector to an input vector. Since the number of code vectors in a vector quantizer is given by an exponential function of the dimension. i.e., L=2$^{nR}$ where Rn. To alleviate this problem, a multiple shell structure of hypercube feature maps (MSSHFM) is proposed. A binary HFM of k-dimension is composed of nodes at hypercube vertices and a multiple shell architecture is constructed by surrounding the k-dimensional hfm with a (k+1)-dimensional HFM. Such a multiple shell construction of nodes inherently has a complete tree structure in it and an efficient partial search scheme can be applied with drastically reduced computational complexity, computer simulations of still image coding were conducted and the validity of the proposed method has been verified.

• 한국통신학회논문지
• /
• 제36권7B호
• /
• pp.771-779
• /
• 2011

It is expected that many heterogeneous wireless systems, such as 3GPP LTE systems, WiMAX systems and WLAN systems, will coexist in the next generation wireless communication environments. Integrated radio resource management and seamless vertical handoff (VHO) should be supported to provide integrated communication services over multi-radio access networks. A new class of adaptive VHO system that views the handoff problem as a pattern recognition problem is proposed. In this paper, we propose a unified radio resource management (URRM) architecture and Support Vector Machine (SVM) based vertical handoff decision system. Extensive simulation studies show the proposed VHO algorithm outperforms RSS based VHO algorithms in terms of throughput and service cost.

• International Journal of Computer Science & Network Security
• /
• 제21권6호
• /
• pp.1-6
• /
• 2021

Recently, pre-trained convolutional neural network CNNs have been widely used and applied for medical image classification. These models can utilised in three different ways, for feature extraction, to use the architecture of the pre-trained model and to train some layers while freezing others. In this study, the ResNet18 pre-trained CNNs model is used for feature extraction, followed by the support vector machine for multiple classes to classify medical images from multi-classes, which is used as the main classifier. Our proposed classification method was implemented on Kvasir and PH2 medical image datasets. The overall accuracy was 93.38% and 91.67% for Kvasir and PH2 datasets, respectively. The classification results and performance of our proposed method outperformed some of the related similar methods in this area of study.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 1999년도 하계종합학술대회 논문집
• /
• pp.601-604
• /
• 1999

We propose a new hierarchical motion estimator architecture that supports the advanced prediction mode of recent low bit-rate video coders such as H.263 and MPEG-4. In the proposed VLSI architecture, a basic searching unit (BSU) is commonly utilized for all hierarchical levels to make a systematic and small sized motion estimator. Since the memory bank of the proposed architecture provides scheduled data flow for calculating 8$\times$8 block-based sum of absolute difference (SAD), both a macroblock-based motion vector (MV) and four block-based MVs are simultaneously obtained for each macroblock in the advanced prediction mode. The proposed motion estimator gives similar coding performance compared with full search block matching algorithm (FSBMA) while achieving small size and satisfying the advanced prediction mode.

• 한국공간구조학회논문집
• /
• 제3권3호
• /
• pp.111-120
• /
• 2003

Tension members is a type of effective structural member, which is often used in large span structures. The structure systems composed with tension members are combined in various way and specific formations. So, there are need to research into the formations of tension structure and the type of adaptation in tension structure architectures. The structure systems with tension members were considered as tension main system, vector system and tension supported bending system, comprehensively. And tension structures were classified into the formation of tension structure with uniaxial or multiaxial line tension member, with surface member, with hybrid member of line and surface, concerning the flow of tension force. In each the formation of tension structure, the typical adaptations to architecture were also investigated through architecture examples. The type of the formation can be used to plan an architecture with respect to the flow of tension force and structural feature.

• 한국정보전자통신기술학회논문지
• /
• 제9권4호
• /
• pp.414-418
• /
• 2016

본 논문은 저면적 gradient magnitude 연산을 위한 하드웨어 구조를 제안한다. 하드웨어 복잡도를 줄이기 위해 정사영 벡터의 특징 및 하드웨어 자원 공유기법을 이용했다. 제안된 하드웨어 구조는 gradient magnitude 연산 알고리즘의 변형 없이 구현되었기 때문에 gradient magnitude 데이터 품질의 열화 없이 구현될 수 있다. 제안된 저면적 gradient magnitude 연산 하드웨어는 Altera Quartus II v15.0 환경에서 Altera Cyclone VI (EP4CE115F29C7N) FPGA를 이용하여 구현되었다. 구현 결과, 기존 하드웨어 구조를 이용하여 구현한 연산기와의 비교에서 15%의 logic elements 및 38%의 embedded multiplier 절감 효과가 있음을 확인했다.

• 한국통신학회논문지
• /
• 제29권11C호
• /
• pp.1541-1550
• /
• 2004

본 논문에서는 다해상도 움직임 추정 알고리즘을 이용하여 모션 리터를 검색하는 고속 다해상도 움직임 추정기에 대한 하드웨어 구조를 제안한다. 동영상 압축기술인 MPEG-4 AVC 전체 구성 중에서 핵심 부분인 움직임 추정 모듈을 하드웨어로 설계하기 위하여 기본적인 구조를 구성하고 높은 화질로 실시간 부호화를 할 수 있도록 고속 움직임 검색을 위해 특수하게 설계된 램 구주 메모리 공유, 4화소x4화소 Motion Vector 추출 등과 같은 기술들을 사용하여 전체 움직임 검색기를 구현하였다. 구현된 전체 모듈은 Altera(사)의 Excalibur 디바이스를 이용한 FPGA 구성을 통해 검증하고 최종적으로 Samsung STD130 0.18um CMOS Cell Library를 이용하며 합성 및 검증을 하였다. 이렇게 검증된 구조의 성능은 ASIC으로 구현할 경우 최대 동작 주파수가 약 140MHz이며 QCIF(176화소x144화소) 사이즈 기준으로 초당 약 1100프레임, 4CIF(704화소x576화구 사이즈 기준으로 초당 약 70프레임의 움직임을 검색할 수 있다 본 성능은 하드웨어 기반의 MPEG-4 AVC 실시간 부호화기를 설계하기에 적합한 구조임을 보여준다.