• Title/Summary/Keyword: Variable Output

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Application of Fuzzy Logic for Predicting of Mine Fire in Underground Coal Mine

  • Danish, Esmatullah;Onder, Mustafa
    • Safety and Health at Work
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    • v.11 no.3
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    • pp.322-334
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    • 2020
  • Background: Spontaneous combustion of coal is one of the factors which causes direct or indirect gas and dust explosion, mine fire, the release of toxic gases, loss of reserve, and loss of miners' life. To avoid these incidents, the prediction of spontaneous combustion is essential. The safety of miner's in the mining field can be assured if the prediction of a coal fire is carried out at an early stage. Method: Adularya Underground Coal Mine which is fully mechanized with longwall mining method was selected as a case study area. The data collected for 2017, by sensors from ten gas monitoring stations were used for the simulation and prediction of a coal fire. In this study, the fuzzy logic model is used because of the uncertainties, nonlinearity, and imprecise variables in the data. For coal fire prediction, CO, O2, N2, and temperature were used as input variables whereas fire intensity was considered as the output variable.The simulation of the model is carried out using the Mamdani inference system and run by the Fuzzy Logic Toolbox in MATLAB. Results: The results showed that the fuzzy logic system is more reliable in predicting fire intensity with respect to uncertainties and nonlinearities of the data. It also indicates that the 1409 and 610/2B gas station points have a greater chance of causing spontaneous combustion and therefore require a precautional measure. Conclusion: The fuzzy logic model shows higher probability in predicting fire intensity with the simultaneous application of many variables compared with Graham's index.

Substrate-bias voltage generator for leakage power reduction of digital logic circuits operating at low supply voltage (초저전압 구동 논리 회로의누설 전류 억제를 위한 기판 전압 발생회로)

  • Kim Gil-Su;Kim Hyung-Ju;Park Sang-Soo;Yoo Jae-Tack;Ki Hoon-Jae;Kim Soo-Won
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.1 s.343
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    • pp.1-6
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    • 2006
  • This paper proposes substrate-bias voltage generator to reduce leakage power consumption of digital logic circuits operating at supply voltage of 0.5V. Proposed substrate-bias voltage generator is composed of VSS and VBB generator. The former circuit produces negative voltage and supplies its output voltage for VBB generator. As a result VBB generator develops much lower negative voltage than that of conventional one. Proposed circuit is fabricated using 0.18um 1Poly-6Metal CMOS process and measurement result demonstrated stable operation with substrate-bias voltage of -0.95V.

Design of a RF fixed phase control circuit using I&Q Demodulator (I&Q Demodulator를 이용한 RF 고정 위상 제어기 설계)

  • Park, Ung-Hee;Chang, Ik-Soo;Huh, Jun-Won;Gang, In-Ho
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.36D no.1
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    • pp.8-14
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    • 1999
  • The active devices used at microwave frequency have the different phase shift according to input power. Especially, The difference of the phase shift is large in the saturation region of the amplifier. In this paper, we disigned the phase control system for fixing the different phase shift at device. With the high frequency nonlinear amplifier, we fabricated such system that the phase shift to be fixed automatically using the varible phase shifter. The variable phase shifter fixed total phase variation of the circuit using the information that was obtained from the comparison of imputsignal phase with output signal phase. Even though the input signal is 2-tone or FM type, we could estimate and also fix the phase variation on DUT Dynamic range is about 10dB. It has been experimented at 1960MHz using Teflon (H=31mil, ${\varepsilon}r$=3.2)

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Performance Improvement and ASIC Design of OAM Function Using Special Cell Field (특별 셀 영역을 이용한 OAM 기능의 성능 향상 및 ASIC 설계)

  • Park, Hyoung-Keun;Kim, Hwan-Yong
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.2
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    • pp.26-36
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    • 1999
  • In this paper, the novel scheme of OAM performance management function is proposed to supply the most of network resources and reliable services by processing data having various QoS(quality of service) in the view of cell loss and cell delay of ATM networks Also, the special fields of OAM cell are defined in order to improve correlate control, operation, and management technique between networks which is required to flexibility and precision control as detecting the performance information of the variable networks periodically. The proposed OAM function, the input/output function of cell, and the interface function of the accessory device which is likely to the memory/CPU are designed to ASIC. The designed chip is carried out the back-end simulation using Verilog-XL simulator of Cadence. In result, it is able to performs an accurate control in $2{\mu}s$.

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A 13-Gbps Low-swing Low-power Near-ground Signaling Transceiver (13-Gbps 저스윙 저전력 니어-그라운드 시그널링 트랜시버)

  • Ku, Jahyun;Bae, Bongho;Kim, Jongsun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.4
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    • pp.49-58
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    • 2014
  • A low-swing differential near-ground signaling (NGS) transceiver for low-power high-speed mobile I/O interface is presented. The proposed transmitter adopts an on-chip regulated programmable-swing voltage-mode driver and a pre-driver with asymmetric rising/falling time. The proposed receiver utilizes a new multiple gain-path differential amplifier with feed-forward capacitors that boost high-frequency gain. Also, the receiver incorporates a new adaptive bias generator to compensate the input common-mode variation due to the variable output swing of the transmitter and to minimize the current mismatch of the receiver's input stage amplifier. The use of the new simple and effective impedance matching techniques applied in the transmitter and receiver results in good signal integrity and high power efficiency. The proposed transceiver designed in a 65-nm CMOS technology achieves a data rate of 13 Gbps/channel and 0.3 pJ/bit (= 0.3 mW/Gbps) high power efficiency over a 10 cm FR4 printed circuit board.

A Parallel Sphere Decoder Algorithm for High-order MIMO System (고차 MIMO 시스템을 위한 저 복잡도 병렬 구형 검출 알고리즘)

  • Koo, Jihun;Kim, Jaehoon;Kim, Yongsuk;Kim, Jaeseok
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.5
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    • pp.11-19
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    • 2014
  • In this paper, a low complexity parallel sphere decoder algorithm is proposed for high-order MIMO system. It reduces the computational complexity compared to the fixed-complexity sphere decoder (FSD) algorithm by static tree-pruning and dynamic tree-pruning using scalable node operators, and offers near-maximum likelihood decoding performance. Moreover, it also offers hardware-friendly node operation algorithm through fixing the variable computational complexity caused by the sequential nature of the conventional SD algorithm. A Monte Carlo simulation shows our proposed algorithm decreases the average number of expanded nodes by 55% with only 6.3% increase of the normalized decoding time compared to a full parallelized FSD algorithm for high-order MIMO communication system with 16 QAM modulation.

The Study on DBPL Encoder Design for Railway Balise Application (철도 발리스 응용을 위한 DBPL 인코더 설계 연구)

  • Lee, Jeong-jun;Yang, Doh-chul;Kim, Seong-jin;Kim, Bong-seob;Kim, Yu-hyeon
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.16 no.2
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    • pp.161-170
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    • 2017
  • The balise is a device for the railroad signal control systems, which is installed between both rail. The balise sends fixed or variable data, named telegram, to the train with wireless method. The telegram includes the position information, the movable distance under the signal status, the gradient, the speed, the temporary speed limit, etc. This research is on a design of the DBPL encoder for the balise. Normally the DBPL encoder for the balise is with the ASIC or FPGA technology. In this research, the DBPL encoder is designed with commercial low power operable micro-controller. The firmware(logic level encode) and the SPI Bus function block(physical level output) of the micro-controller are used for the DBPL encode. Under the european standard, the required working speed of the DBPL encoder is 564.48Kbps. The DBPL encoder of this research is tested under the speed of 564.48Kbps, and it worked properly.

PUF Logic Employing Dual Anti-fuse OTP Memory for High Reliability (신뢰성 향상을 위한 듀얼 안티퓨즈 OTP 메모리 채택 D-PUF 회로)

  • Kim, Seung Youl;Lee, Je Hoon
    • Convergence Security Journal
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    • v.15 no.3_1
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    • pp.99-105
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    • 2015
  • A typical SRAM-based PUF is used in random number generation and key exchange process. The generated out puts should be preserved, but the values are changed owing to the external environment. This paper presents a new D-PUF logic employing a dual anti-fuse OTP memory to the SRAM-based PUF. The proposed PUF can enhance the reliability of the logic since it can preserve the output values. First, we construct the OTP memory using an anti-fuse. After power up, a SRAM generates the random values owing to the mismatch of cross coupled inverter pair. The generated random values are programed in the proposed anti-fuse ROM. The values that were programed in the ROM at once will not be changed and returned. Thus, the outputs of the proposed D-PUF are not affected by the environment variable such as the operation voltage and temperature variation, etc. Consequently, the reliability of the proposed PUF will be enhanced owing to the proposed dual anti-fuse ROM. Therefore, the proposed D-PUF can be stably operated, in particular, without the powerful ECC in the external environment that are changed.

Nonlinear Approximations Using Modified Mixture Density Networks (변형된 혼합 밀도 네트워크를 이용한 비선형 근사)

  • Cho, Won-Hee;Park, Joo-Young
    • Journal of the Korean Institute of Intelligent Systems
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    • v.14 no.7
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    • pp.847-851
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    • 2004
  • In the original mixture density network(MDN), which was introduced by Bishop and Nabney, the parameters of the conditional probability density function are represented by the output vector of a single multi-layer perceptron. Among the recent modification of the MDNs, there is the so-called modified mixture density network, in which each of the priors, conditional means, and covariances is represented via an independent multi-layer perceptron. In this paper, we consider a further simplification of the modified MDN, in which the conditional means are linear with respect to the input variable together with the development of the MATLAB program for the simplification. In this paper, we first briefly review the original mixture density network, then we also review the modified mixture density network in which independent multi-layer perceptrons play an important role in the learning for the parameters of the conditional probability, and finally present a further modification so that the conditional means are linear in the input. The applicability of the presented method is shown via an illustrative simulation example.

A Study on the Management Efficiency Effect Factor of Korean Ocean Carriers

  • Hong, Sog-Min;Ahn, Ki-Myung
    • Journal of Navigation and Port Research
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    • v.44 no.2
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    • pp.119-127
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    • 2020
  • In this study, the current state of management efficiency of ocean carriers in Korea and the factors affecting them were analyzed. The purpose of this research is to enhance global competitiveness of ocean carriers by presenting suggestions that can improve management efficiency based on the analysis results. The measurement of management efficiency was made using the DEA model. The results of testing the adequacy of the input and output variables used are as follows. Appropriate inputs are total assets, cost of goods sold, charter expenses, sales and general management expenses, and interest expenses. Appropriate variables are sales, operating income, and operating cash flow. According to the analysis results of the DEA model by these variables, inefficient carriers (78%) are nearly four times more than efficient carriers(22%). However, container carriers have the most improved management efficiency compared to 2016 and 2017. According to the panel regression analysis, the charter rate has the greatest negative impact on efficiency (CRS), and the debt rate has a significant negative impact. Thus, it appears that reducing the charter size and the debt-to-sale rate facilitate improvement of the management efficiency of ocean carriers. Additionally, the pre-sales tax return rate, value added rate, total asset turnover rate, and the scale variable and interest coverage rate have a positive (+) effect. Thus ocean carriers should restore their global competitiveness by improving management efficiency by securing stable cargoes increasing sales profitability from the cost management perspective, increasing productivity, and enhancing the efficiency of their total assets through efficient fleet management.