• Journal of the Korean Academic Society of Industrial Cluster
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• v.2 no.1
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• pp.28-43
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• 2008

This paper searches for a potential path of Korean clusters to be competitive global innovation clusters (CGICs) and provides appropriate policy interventions to promote the cluster formation process in Korea. It argues that clusters which have their distinctive competitiveness are created as the cluster members are collectively responding to the switching forces in a rapidly changing capitalist economy. The Korean economy has acquired various assets through the rapid economic progress and these can be efficiently utilized for the creation of globally leading clusters in Korea. The process is not just copying the one and only Silicon Valley model but to create the distinguished Korean model of locally embedded innovation. That requires a recreation process of innovation clusters in Korea.

• Journal of the Semiconductor & Display Technology
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• v.19 no.4
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• pp.99-104
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• 2020

In this paper, efficiency and loss characteristics of GaN FET were reported by applying it into the QR flyback converter. In particular, for the comparison of efficiency characteristics, QR flyback converter experimental circuits with Si FET and with GaN FET were separately produced in 12W class. As a result of the experiment, the experimental circuit of the QR flyback converter using GaN FET reached a high efficiency of 90% or more when the load power was 2W or more, and the maximum efficiency was observed to be about 92%, and the maximum loss power was about 1.1W. Meanwhile, the efficiency of the experimental circuit with Si FET increased as the input voltage increased, and the maximum efficiency was observed to be about 82% when the load power was 9W or higher, and the maximum loss power was about 2.8W. From the results, it is estimated that that in the case of the experimental circuit applying the GaN FET switch, the power conversion efficiency was improved as the switching loss and conduction loss due to on-resistance were reduced, and the internal loss due to the synchronous rectifier was minimized. Consequently, it is concluded that the GaN FET is suitable for under 20W class power supply unit as a high efficiency power switch.

• Journal of Electrical Engineering and Technology
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• v.10 no.5
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• pp.1989-2000
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• 2015

In this paper, digital peak current mode control for single phase H-bridge inverters is developed and implemented. The digital peak current mode control is achieved by directly controlling the PWM signals by cycle-by-cycle current limitation. Unlike the DC-DC converter where the output voltage always remains in the positive region, the output of DC-AC inverter flips from positive to negative region continuously. Therefore, when the inverter operates in negative region, the control should be changed to valley current mode control. Thus, a novel control logic circuit is required for the function and need to be analyzed for the hardware to track the sinusoidal reference in both regions. The problem of sub-harmonic instability which is inherent with peak current mode control is also addressed, and then proposes the digital slope compensation in constant-sloped external ramp to suppress the oscillation. For unipolar PWM switching method, an adaptive slope compensation in digital manner is also proposed. In this paper, the operating principles and design guidelines of the proposed scheme are presented, along with the performance analysis and numerical simulation. Also, a 200W inverter hardware prototype has been implemented for experimental verification of the proposed controller scheme.

• Journal of IKEEE
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• v.22 no.4
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• pp.985-991
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• 2018

In this paper, an equivalent circuit reflecting the internal loss of the LLC resonant half bridge converter was proposed and a steady state characteristic equation including the loss factors was derived. Using the results, the frequency characteristics of I/O voltage gain and input impedance were compared with the lossless model In order to verify the proposed model and the derived equation, the main components of the 1kW class LLC resonant half bridge converter were selected under the same conditions and the steady state characteristics such as voltage gain and input impedance were compared. In particular, to compare more closely the steady state error of the two models, we observed the change in switching frequency with respect to the load current, which is considered to be the most important in the actual circuit design stage. As a result, it is confirmed that the error of the operating frequency is significantly improved from the proposed model and the analysis result.

• Journal of Electrical Engineering and Technology
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• v.13 no.6
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• pp.2310-2318
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• 2018

Critical conduction mode (CRM) operation is more efficient than continuous conduction mode (CCM) operation at low power levels because of the valley switching of switches and elimination of the reverse recovery losses of boost diodes. When using a sensorless digital control method, an error occurs between the actual and the estimated current. Because of the error, it operates as CCM or discontinuous conduction mode (DCM) during CRM operation and also has an adverse effect on THD of input current. In this paper, a current sensorless technique is presented in an inverter system using a bridgeless boosted power factor correction converter, and a compensation method is proposed to reduce CRM calculation error. The validity of the proposed method is verified by simulation and experiment.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.4
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• pp.27-32
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• 1997

In resonant tunneling diodes with the quantum well structure showing the negative differential resistance (NDR), it is essential to increase both the peak-to-valley current ratio (PVCR) and the peak current desnity ( $J_{p}$) for the accurate digital switching operation and the high output of the device. In this work, a resonant interband tunneling diode (RITD) with single quantum well structure, which is composed of I $n_{0.47}$As/I $n_{0.52}$A $l_{0.48}$As heterojunction on the InP substrate, is fabricated ot improve PVCR and JP, and then the dependence of I-V charcteristics on the width of the quantum well was investigated.d.ted.d.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.2
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• pp.75-80
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• 1994

AlAs/GaAs/AlAs RTDs(Resonant Tunneling Diodes) are fabricated and current-voltage properties of them are measured. At room temperature, peak to valley ratio is 2.4 NOT.AND.OR logic gates and Flip-Flop are fabricated using the bistable characteristics of RTDs. Although NOT.AND.OR logic gates need 5~8 transistors. only one RTD is sufficient to fabricate the logic gates. Since the switching time is very short(<10$^12$sec), it is possible to drive the semiconductor circuits fast and integrate them very large. And it is convinced the possibility of integrating RTDs to multilevel logic circuits by observing two peaks of similar current in the serial connection of two RTDs.

• Proceedings of the KIEE Conference
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• 1996.07c
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• pp.1456-1458
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• 1996

In resonant tunneling diodes with the quantum well structure showing the negative differential resistance (NDR), it is essential to increase both the peak-to-valley current ratio (PVCR) and the peak current density ($J_p$) for the accurate switching operation and the high output of the device. In this work, a resonant interband tunneling diode (RITD) with single quantum well structure, which is composed of $In_{0.53}Ga_{0.47}As/ln_{0.52}Al_{0.48}As$ heterojunction on the InP substrate, is suggested to improve the PVCR and $J_p$ through the narrowed tunnel barriers. As the result, the measured I-V curves showed the PVCR over 60.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.30-31
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• 2017

본 논문은 인터리브드 준공진 플라이백 컨버터에 추가회로 없이 적용된 최적의 밸리 스위칭 기법을 제안한다. 인터리브드 준공진 플라이백 컨버터는 스위치 양단 전압(Drain-Source voltage)$V_{DS}$이 최소화 되는 지점에서 스위치 턴 온이 되어 전체 시스템의 효율이 향상되고, EMI (Electro Magnetic Interference)와 EMC (Electro Magnetic Compatibility)의 영향을 최소화시킬 수 있다. 제안한 기법은 MCU (Micro Controller Unit) 기반 소용량 컨버터에 간단한 수식을 이용하여 최적의 밸리 스위칭 기법을 가능하게 한다. 제안한 기법은 시스템의 가격과 부피 상승 없이 효율을 향상시키고, EMI와 EMC의 영향을 최소화시킨다. 제안하는 기법의 성능은 시뮬레이션을 통해 확인하였다.

• Proceedings of the KIPE Conference
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• 2020.08a
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• pp.79-81
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• 2020

임계모드 (Critical conduction mode, CrM) 동작을 하는 PFC 컨버터는 주파수 변동을 통한 Valley switching 동작으로 인하여 높은 효율 및 양호한 EMI 특성을 가진다. 하지만 Peak 부하가 큰 시스템에서 CrM 설계를 하게 되면 정격부하에서 비교적 높은 주파수의 동작이 불가피하여 시스템 효율이 나빠지고 높은 DC-bias 확보를 위해 인덕터 크기가 커지게 된다. 따라서 본 논문에서는 고효율 및 인덕터 사이즈 저감을 위한 임계모드에서 동작하는 두 개의 교차형 PFC 컨버터의 병렬 구동에 대해서 이야기하고자 한다.