• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.86.1-86.1
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• 2015

As the feature size of Si-based semiconductor shrinks to nanometer scale, we are facing to the problems such as short channel effect and leakage current. One of the solutions to cope with those issues is to bring III-V compound semiconductors to the semiconductor structures, because III-V compound semiconductors have much higher carrier mobility than Si. However, introduction of III-V semiconductors to the current Si-based manufacturing process requires great challenge in the development of process integration, since they exhibit totally different physical and chemical properties from Si. For example, epitaxial growth, surface preparation and wet etching of III-V semiconductors have to be optimized for production. In addition, oxidation mechanisms of III-V semiconductors should be elucidated and re-growth of native oxide should be controlled. In this study, surface preparation methods of various III-V compound semiconductors such as GaAs, InAs, and GaSb are introduced in terms of i) how their surfaces are modified after different chemical treatments, ii) how they will be re-oxidized after chemical treatments, and iii) is there any effect of surface orientation on the surface preparation and re-growth of oxide. Surface termination and behaviors on those semiconductors were observed by MIR-FTIR, XPS, ellipsometer, and contact angle measurements. In addition, photoresist stripping process on III-V semiconductor is also studied, because there is a chance that a conventional photoresist stripping process can attack III-V semiconductor surfaces. Based on the Hansen theory various organic solvents such as 1-methyl-2-pyrrolydone, dimethyl sulfoxide, benzyl alcohol, and propylene carbonate, were selected to remove photoresists with and without ion implantation. Although SPM and DIO3 caused etching and/or surface roughening of III-V semiconductor surface, organic solvents could remove I-line photoresist without attack of III-V semiconductor surface. The behavior of photoresist removal depends on the solvent temperature and ion implantation dose.

• Journal of Korean Society for Atmospheric Environment
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• v.25 no.5
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• pp.382-391
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• 2009

The aim of the study was to assess the levels in typical central borough of phthalate exposure by monitoring children's facilities (19 kindergartens and 21 elementary schools) and households (17 old apartments and 22 new apartments) via sampling indoor floor dust. A vacuum cleaner specifically prepared for sampling dust was attached to a filter of a vacuum cleaner dust collecting container. During the sample preparation process, containers made of glass were used and analysis was performed using GC-MSD. The mean concentration of DEHP was $412{\mu}g/g$, DnBP was $24{\mu}g/g$, and BBzP was $10{\mu}g/g$ dust. The indoor characteristics including floor, wall materials, years after construction, water leakage history for the past three years, and ventilation were also examined to categorize phthalate esters from the dust samples. From the flooring and wallpaper materials of kindergartens and elementary schools, DEHP in the dust sample appeared at a statistically significant level (p<0.05) when PVC materials were present. DEHP in the indoor dust also increased significantly (p<0.01) during the construction period. The daily intake of DEHP measured from indoor dust was 0.08~$19.7{\mu}g/kg/day$ for children and 0.02~$1.1{\mu}g/kg/day$ for adults (women). The results clearly revealed that phthalate exposure is greater in children than in adults (women) due to the indoor dust.

• Journal of the Korean Vacuum Society
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• v.10 no.2
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• pp.189-193
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• 2001

We have characterized physical and electrical properties of W-TiN stacked gate electrode structure with TiN as a diffusion barrier of fluorine. As the $N_2/Ar$ gas ratio increased during sputter deposition, TiN thin films became N-rich, and the resistivity of the films increased. However, the resistivity of W-TiN stacked gate reduced as a result of the crystallization of tungsten with the increase of $N_2/Ar$ gas ratio. On the other hand, tungsten in W-TiN stacked gate structure have the (100)-oriented crystalline structure although TiN films were subjected to annealing at high temperature (600~$800^{\circ}C$). Leakage currents of W-TiN gate MOS capacitors were less than $10^{-7}\textrm{/Acm}^2$ and also were lowered by the order of 2 compared with those of pure W gate electrode.

• Journal of the Korean Vacuum Society
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• v.10 no.1
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• pp.51-56
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• 2001

$CeO_2$ thin films as insulator for MFISFET (Metal-ferroelectric-insulator- semiconductor-field effect transistor) were deposited by r.f. magnetron sputtering. Ar and $O_2$ gas as the deposition gas were used and the effects of oxygen partial pressure during sputtering on texture and electrical properties of $CeO_2$ thin films were evaluated. All $CeO_2$ thin films deposited on p-type Si(100) substrate at $600^{\circ}C$ exhibited (200) preferred orientation. The films deposited with only Ar gas among various condition had highest preferred orientation but show large hysteresis characteristics in capacitance-voltage measurement due to relatively many charged paricles and roughness. Films show smooth surface state and good C-V characteristics with increasing oxygen partial pressure. It was thought that this trend in C-V characteristics was due to the amount of mobile ionic charge within $CeO_2$ films. The composition of films show oxygen excess, that is, O/$Ce_2$ ratio of films was 2.22~2.42 range and leakage current of films show $10^{-7}~10^{-8}A$order at 100 kV/cm.

• Journal of the Korean Vacuum Society
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• v.12 no.1
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• pp.40-45
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• 2003

High quality $Ta_2O_5$ thin films have been obtained from the anodization of deposited tantalum (Ta). The as-deposited amorphous films of 750 $\AA$ thickness have excellent electrical properties. These properties include refractive indices 2.1~2.2 dielectric constants ~25, and leakage currents $10^{-8}$ /A$\textrm{cm}^{-2}$ at 1 MV$\textrm{cm}^{-1}$. We fabricated a MIM element with the $Ta_2O_5$ films. They have perfect current-voltage symmetry characteristics. A high performance MIM device was formed by newly developed processes based on our unique anodization and annealing treatment. The effects of various processing conditions (top-electrode metals, annealing conditions) on the MIM device performances will be extensively discussed throughout this work.

• Journal of the Korean Vacuum Society
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• v.11 no.4
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• pp.230-234
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• 2002

Metal-ferroelectric-semiconductor(MFS) capacitors by using rapid thermal annealed $LiNbO_3$/Si structures were successfully fabricated and demonstrated nonvolatile memory operations of the MFS capacitors. The C-V characteristics of MFS capacitors showed a hysteresis loop due to the ferroelectric nature of the $LiNbO_3$thin film. The dielectric constant of the $LiNbO_3$film calculated from the capacitance in the accumulation region in the capacitance-voltage(C-V) curve was about 25. The gate leakage current density of MFS capacitor using a platinum electrode showed the least value of $1{\times}10^{-8}\textrm{A/cm}^2$ order at the electric field of 500 kV/cm. The minimum interface trap density around midgap was estimated to be about $10^{11}/cm^2$.eV. The typical measured remnant polarization(2Pr) value was about 1.2 $\mu\textrm{C/cm}^2$, in an applied electric field of $\pm$ 300 kv/cm. The ferroelectric capacitors showed no polarization degradation up to about $10^{10}$ switching cycles when subjected to symmetric bipolar voltage pulse in the 500 kHz.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.388-388
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• 2010

In this study, Ferroelectric vinylidene fluoride-trifluoroethylene (VF2-TrFE) copolymer films were directly deposited on degenerated Si (n+, $0.002\;{\Omega}{\cdot}cm$) using by spin coating method. A 1~5 wt% diluted solution of purified vinylidene fluoride-trifluoroethylene (VF2:TrFE = 70:30) in a dimethylformamide (DMF) solvent were prepared and deposited on silicon wafers at a spin rate of 2000 ~ 4000 rpm for 2 ~ 30 seconds. After annealing in a vacuum ambient at 100 ~ $200^{\circ}C$ for 60 min, upper aluminum electrodes were deposited by vacuum evaporation for electrical measurement. X-ray diffraction results showed that the VF2-TrFE films on Si substrates had $\beta$-phase of copolymer structures. The capacitance on highly doped Si wafer showed hysteresis behavior like a butterfly shape and this result indicates clearly that the copolymer films have ferroelectric properties. The typical measured remnant polarization ($P_r$) and coercive filed ($E_c$) values were about $5.7\;{\mu}C/cm^2$ and 710 kV/em, respectively, in an applied electric field of ${\pm}$ 1.5 MV/em. The gate leakage current densities measured at room temperature was less than $7{\times}10^{-7}\; A/cm^2$ under a field of 1 MV/cm.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.306.2-306.2
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• 2014

전자기기의 휴대성과 이동성이 강조되고 있는 현대사회에서 비휘발성 메모리는 메모리 산업에 있어 매우 매력적인 동시에 커다란 잠재성을 지닌다. 이미 공정의 한계에 부딪힌 Flash 메모리를 대신하여 10nm 이하의 공정이 가능한 상변화 메모리(Phase-Change Memory, PRAM), 스핀 주입 자화 반전 메모리(Spin Transfer Torque-Magnetic RAM, STT-MRAM), 저항 변화 메모리(Resistive Random Access Memory, ReRAM)가 차세대 비휘발성 메모리 후보로서 거론되고 있으며, 그 중에서도 ReRAM은 빠른 속도와 낮은 소비 전력, CMOS 공정 호환성, 그리고 비교적 단순한 3차원 적층 구조의 특성으로 인해 활발히 연구되고 있다. 특히 최근에는 질화물 또는 질소를 도핑한 산화물을 저항변화 물질로 사용하는 ReRAM이 보고되고 있는데, 이들은 동작전압이 낮을 뿐만 아니라 저항 변화(Resistive Switching, RS) 과정에서 일어나는 계면 산화를 방지할 수 있으므로 ReRAM의 저항 변화 재료로서 각광받고 있다. 그러나 Cell 단위의 ReRAM 소자를 Crossbar Array 구조에 적용시켰을 때 주변 Cell과의 저항 상태 차이로 인해 전류가 낮은 저항 상태(LRS)의 Cell로 흘러 의도치 않은 동작을 야기한다. 이와 같이 누설 전류(Leakage Current)로 인한 상호간의 간섭이 일어나는 Cross-talk 현상이 존재하며, 공정의 간소화와 집적도를 유지하면서 이 문제를 해결하는 것은 실용화하기에 앞서 매우 중요한 문제이다. 따라서, 본 논문에서는 Read 동작 시 발생하는 Cell과 Cell 사이의 Cross-talk 문제를 해결하기 위해 자가 정류 특성(Self-Rectifying)을 가지는 실리콘 질화물/알루미늄 질화물 이중층(Si3N4/AlN Bi-layer)으로 구성된 ReRAM 소자 구조를 제안하였으며, Sputtering 방법을 이용하여 제안된 소자를 제작하였다. 전압-전류 특성 실험결과, 제안된 구조에 대한 에너지 밴드 다이어그램 시뮬레이션 결과와 동일하게 Positive Bias 영역에서 자가 정류 특성을 획득하였고, 결과적으로 Read 동작 시 발생하는 Cross-talk 현상을 차단할 수 있는 결과를 확보하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.307-307
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• 2014

정보화 시대로 접어들면서 동일한 공간에 더 많은 정보를 저장할 수 있고, 보다 빠른 동작이 가능한 비휘발성 메모리 소자에 대한 요구가 증가하고 있다. 하지만, 최근 비휘발성 메모리 소자 관련 연구보고에 따르면, 메모리 소자의 소형화 및 직접화 측면에서, 전하 저장을 기반으로 하는 기존의 Floating-Gate(FG) Flash 메모리는 20 nm 이하 공정에서 한계가 예측 되고 있다. 따라서, 이러한 FG Flash 메모리의 한계를 해결하기 위해, 기존에 FET 기반의 FG Flash 구조와 같은 3 terminal이 아닌, Diode와 같은 2 terminal로 동작이 가능한 ReRAM, PRAM, STT-MRAM, PoRAM 등 저항변화를 기반으로 하는 다양한 종류의 차세대 메모리 소자가 연구되고 있다. 그 중, 저항 변화 메모리(ReRAM)는 CMOS 공정 호환성, 3D 직접도, 낮은 소비전력과 빠른 동작 속도 등의 우수한 동작 특성을 가져 차세대 비휘발성 메모리로 주목을 받고 있다. 또한, 상하부 전극의 2 terminal 만으로 소자 구동이 가능하기 때문에 Passive Crossbar-Array(CBA)로 적용하여 플래시 메모리를 대체할 수 있는 유력한 차세대 메모리 소자이다. 하지만, 이를 현실화하기 위해서는 Passive CBA 구조에서 발생할 수 있는 Read Disturb 현상, 즉 Word-Line과 Bit-Line을 통해 선택된 소자를 제외하고 주변의 다른 소자를 통해 흐르는 Sneak Leakage Current(SLC)를 차단하여 소자의 메모리 State를 정확히 sensing하기 위한 연구가 선행 되어야 한다. 따라서, 현재 이러한 이슈를 해결하기 위해서, 많은 연구 그룹에서 Diodes, Threshold Switches와 같은 ReRAM에 Selector 소자를 추가하는 방법, 또는 Self-Rectifying 특성 및 CRS 특성을 보이는 ReRAM 구조를 제안 하여 SLC를 차단하고자 하는 연구가 시도 되고 있지만, 아직까지 기초연구 단계로서 아이디어에 대한 가능성 정도만 보고되고 있는 현실 이다. 이에 본 논문은 Passive CBA구조에서 발생하는 SLC를 해결하기 위한 새로운 아이디어로써, 본 연구 그룹에서 선행 연구로 확보된 안정적인 저항변화 물질인 SiN를 정류 특성을 가지는 n-Si/Ti 기반의 Schottky Diode와 결합함으로써 기존의 CBA 메모리의 Read 동작에서 발생하는 SLC를 차단 할 수 있는 1SD-1R 구조의 메모리 구조를 제작 하였으며, 본 연구 결과 기존에 문제가 되었던 SLC를 차단 할 수 있었다.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.462-462
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• 2014

The effect of rear passivation for passivated emitter and rear cell (PERC) using ozone and H2O oxidant of atomic layer deposited (ALD) Al2O3 was studied by post-annealing in N2 and forming gas ambients. Rear surface of PERC solar cell was passivated by Al2O3 grown by ALD with ozone and H2O oxidant. Al2O3 grown by ALD with ozone oxidant has been known to have many advantages, such as lower interface defects, low leakage current density. Its passivation quality is better than Al2O3 with H2O. Al2O3 layer with 10 nm and 20 nm thickness was grown at $150^{\circ}C$ with ozone oxidant and at $250^{\circ}C$ with H2O oxidant. And then each samples were post-annealled at $450^{\circ}C$ in N2 ambients and at $850^{\circ}C$ in forming gas ambients. The passivation quality was investigated by measuring the minority carrier lifetime respectively. We examined atomic layer deposited Al2O3 such as growth rate, film density, thickness, negative fixed charge density at AlOx/Si interface, and reflectance. The influences of process temperature and heat treatment were investigated using Sinton (WCT-120) by Quasi-Steady State Photoconductance (QSSPC) mode. Ozone-based ALD Al2O3 film shows the best carrier lifetime at lower deposition temperature than H2O-based ALD.