• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.5
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• pp.133-142
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• 2004

Recently, the growth of Internet and a variety of multimedia services through Internet increasingly demands high-speed packet transmission, the new routing function, and QoS guarantee on conventional routers. Thus, a new switching mechanical called the MPLS(Multi-Protocol Label Switching), was proposed by IETF(Internet Engineering Task Force) as a solution to meet these demands. In addition the deployment of MPLS network supporting Differentiated Services is required. In this paper, we propose the architecture of the MPLS switch supporting Differentiated Services in the MPLS-based network. The traffic conditioner consists of a classifier, a meter, and a marker. The VOQ-PHB module, which combines input Queue with each PHB queue, is implemented to utilize the resources efficiently. It employs the Priority-iSLIP scheduling algorithm to support high-speed switching. We have designed and verified the new and fast hardware architecture of VOQ-PHB and the traffic conditioner for QoS and high-speed switching using NS-2 simulator. In addition, the proposed architecture is modeled in VHDL, synthesized and verified by the VSS analyzer from SYNOPSYS. Finally, to justify the validity of the hardware architecture, the proposed architecture is placed and routed using Apollo tool.

• Proceedings of the Korea Information Processing Society Conference
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• 2002.11b
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• pp.1217-1220
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• 2002

인터넷 트랙픽의 급격한 증가에 따라, 새로운 멀티미디어 서비스의 요구를 수용하기 위해서 MPLS가 제안되었으며, MPLS는 QoS를 보장하는 Differentiated Service클 제공하는 방향으로 진화되고 있다. 또한 MPLS에서 Giga/Tera 라우터에서 제공하는 고속의 스위칭과 확장성을 보장할 필요성이 증가되었다. 본 논문에서는 고속의 스위칭이 가능하고 QoS를 보장하는 MPLS 라우터의 구조를 제안한다. 스위치는 입력 큐잉 방식으로 QoS를 보장하도록 VOQ와 PHB별 큐를 확장한 방식이며, 이의 스케쥴링 알고리즘으로는 Priority-iSLIP 알고리즘을 사용하였다. 제안한 구조는 NS-2 시뮬레이터로 모델링하여 검증하였다.

• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.1847-1850
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• 2002

In this paper, MPLS Router module supporting Differentiated Service(Diffserv) for quality of Service (QoS) and High-speed switching is proposed and implemented. And we compare and analyze the proposed architecture with the conventional one in terms of CLR (Cell Loss Rate) and average delay. Switch is an extended system of Queue of each VOQ and PHB in the manner of Input Queuing for QoS. Algorithm, Priority-iSLIP is used for its scheduling algorithm. The proposed architecture is modeled in C++ and verified.