• Title/Summary/Keyword: VGA(Variable gain amplifier)

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Design of Variable Gain Amplifier with a Gain Slope Controller in Multi-standard System (다중 표준 시스템을 위한 이득 곡선 제어기를 가진 가변이득 증폭기 설계)

  • Choi, Moon-Ho;Lee, Won-Young;Kim, Yeong-Seuk
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.21 no.4
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    • pp.321-328
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    • 2008
  • In this paper, variable gain amplifier(VGA) with a gain slope controller has been proposed and verified by circuit simulations and measurements. The proposed VGA has a gain control, gain slope switch and variable gain range. The input source coupled pair with diode connected load is used for VGA gain stage. The gain slope controller with switch can control VGA gain slope. The proposed VGA is fabricated in $0.18{\mu}m$ CMOS process for multi -standard wireless receiver. The proposed two stage VGA consumes min. 2.0 mW to max. 2.6 mW in gain control range and gives input IP3 of -3.77 dBm and NF of 28.7 dB at 1.8 V power supply under -25 dBm, 1 MHz input. The proposed VGA has 37 dB(-16 dB $\sim$ 21 dB) variable gain range, and 8 dB gain range control per 0.3 V control voltage, and can provide variable gain, positive and negative gain slope control, and gain range control. This VGA characteristics provide design flexibility in multi-standard wireless receiver.

Design of Variable Gain Amplifier without Passive Devices (수동 소자를 사용하지 않는 가변 이득 증폭기 설계)

  • Cho, Jong Min;Lim, Shin Il
    • Journal of Korea Society of Industrial Information Systems
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    • v.18 no.5
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    • pp.1-8
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    • 2013
  • This paper presents a variable gain amplifier(VGA) without passive devices. This VGA employes the architecture of current feedback amplifier and variable gain can be achieved by using the GM ratios of two trans-conductance(gm) circuits. To obtain linearity and high gain, it uses current division technique and source degeneration in feedback GM circuits. Input trans-conductance(GM) circuit was biased by using a tunable voltage controller to obtain variable gain. The prototype of the VGA is designed in $0.35{\mu}m$ CMOS technology and it is operating in sub-threshold region for low power consumption. The the gain of proposed VGA is varied from 23dB to 43dB, and current consumption is $2.82{\mu}A{\sim}3{\mu}A$ at 3.3V. The area of VGA is 1$120{\mu}m{\times}100{\mu}m$.

Switched-Capacitor Variable Gain Amplifier with Operational Amplifier Preset Technique

  • Cho, Young-Kyun;Jeon, Young-Deuk;Kwon, Jong-Kee
    • ETRI Journal
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    • v.31 no.2
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    • pp.234-236
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    • 2009
  • We present a novel operational amplifier preset technique for a switched-capacitor circuit to reduce the acquisition time by improving the slewing. The acquisition time of a variable gain amplifier (VGA) using the proposed technique is reduced by 30% compared with a conventional one; therefore, the power consumption of the VGA is decreased. For additional power reduction, a programmable capacitor array scheme is used in the VGA. In the 0.13 ${\mu}m$ CMOS process, the VGA, which consists of three-stages, occupies 0.33 $mm^2$ and dissipates 19.2 mW at 60 MHz with a supply voltage of 1.2 V. The gain range is 36.03 dB, which is controlled by a 10-bit control word with a gain error of ${\pm}0.68$ LSB.

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A Single-Stage 37 dB-Linear Digitally-Controlled Variable Gain Amplifier for Ultrasound Medical Imaging

  • Cho, Seong-Eun;Um, Ji-Yong;Kim, Byungsub;Sim, Jae-Yoon;Park, Hong-June
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.5
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    • pp.579-587
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    • 2014
  • This paper presents a variable gain amplifier (VGA) for an analog front-end (AFE) of ultrasound medical imaging. This VGA has a closed-loop topology and shows a 37-dB-linear characteristic with a single-stage amplifier. It consists of an op-amp, a non-binary-weighted capacitor array, and a gain-control block. This non-binary-weighted capacitor array reduces the required number of capacitors and the complexity of the gain-control block. The VGA has been fabricated in a 0.35-mm CMOS process. This work gives the largest gain range of 37 dB per stage, the largest P1 dB of 9.5 dBm at the 3.3-V among the recent VGA circuits available in the literature. The voltage gain is controlled in the range of [-10, 27] dB in a linear-in-dB scale with 16 steps by a 4-bit digital code. The VGA has a bandpass characteristic with a passband of [20 kHz, 8 MHz].

An Inherently dB-linear All-CMOS Variable Gain Amplifier

  • Kwon, Ji-Wook;Ryu, Seung-Tak
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.11 no.4
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    • pp.336-343
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    • 2011
  • This paper introduces a simple variable gain amplifier (VGA) structure that shows an inherently dB-linear gain control property. Requiring no additional components for dB-linear control, the structure is compact and power efficient. The designed two-stage VGA shows a gain control range of 60dB with the gain error in the range of ${\pm}0.4$ dB. The power consumption including the output buffer is 20.4 mW from 1.2 V supply voltage with bandwidth of 630 MHz. The prototype was fabricated in a 0.13 ${\mu}m$ CMOS process and the VGA core occupies 0.06 $mm^2$.

A CMOS RF Power Detector Using an AGC Loop (자동 이득제어 루프를 이용한 CMOS RF 전력 검출기)

  • Lee, Dongyeol;Kim, Jongsun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.11
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    • pp.101-106
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    • 2014
  • This paper presents a wide dynamic range radio-frequency (RF) root-mean-square (RMS) power detector using an automatic gain control (AGC) loop. The AGC loop consists of a variable gain amplifier (VGA), RMS conversion block and gain control block. The VGA exploits dB-linear gain characteristic of the cascade VGA. The proposed circuit utilizes full-wave squaring and generates a DC voltage proportional to the RMS of an input RF signal. The proposed RMS power detector operates from 500MHz to 5GHz. The detecting input signal range is from 0 dBm to -70 dBm or more with a conversion gain of -4.53 mV/dBm. The proposed RMS power detector is designed in a 65-nm 1.2-V CMOS process, and dissipates a power of 5 mW. The total active area is $0.0097mm^2$.

dB-Linear CMOS Variable Gain Amplifier for GPS Receiver (dB-선형적 특성을 가진 GPS 수신기를 위한 CMOS 가변 이득 증폭기)

  • Jo, Jun-Gi;Yoo, Chang-Sik
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.7
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    • pp.23-29
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    • 2011
  • A dB-linearity improved variable gain amplifier (VGA) for GPS receiver is presented. The Proposed dB-linear current generator has improved dB-linearity error of ${\pm}0.15$dB. The VGA for GPS is designed using proposed dB-linear current generator and composed of 3 stage amplifiers. The IF frequency is assumed as 4MHz and the linearity requirement of the VGA for GPS receiver is defined as 24dBm of IIP3 using cascaded IIP3 equation and the VGA satisfies 24dBm when minimum gain mode. The DC-offset voltage is eliminated using DC-offset cancelation loop. The gain range is from -8dB to 52dB and the dB-linearity error satisfies ${\pm}0.2$dB. The 3-dB frequency has range of 35MHz~106MHz for the gain range. The VGA is designed using 0.18${\mu}m$ CMOS process. The power consumption is 3mW with 1.8V supply voltage.

A design of variable gain amplifier for wireless LAN (무선 LAN을 위한 가변이득 증폭기의 설계)

  • 송용원;이재웅;김건욱;박한규
    • Proceedings of the IEEK Conference
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    • 1999.06a
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    • pp.873-876
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    • 1999
  • A variable gain amplifier(VGA) for wireless LAN is designed using active feedback. The amplifier is controlled by the gate voltage in the feedback path. This amplifier has more than 30㏈ gain variation and a improved linearity in the RF receiver block as input voltage increases. An active feedback topology is used by P-HEMT and is also analyzed for FET equivalent model.

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10MHz/77dB dynamic range CMOS linear-in-dB variable gain amplifiers (10MHz/77dB 다이내믹 영역을 가진 선형 가변 이득 증폭기)

  • Cha, Jin-Youp;Yeo, Hwan-Seok;Kim, Do-Hyung;Burm, Jin-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.8
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    • pp.16-21
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    • 2007
  • CMOS variable gain amplifier (VGA) IC designs for the structure monitoring systems of the telemetries were developed. A three stage cascaded VGA using a differential amplifier and a linear-in-dB controller is presented. A proposed VGA is a modified version of a conventional VGA such that the gain is controlled in a linear-in-dB fashion through the current ratio. The proposed VGA circuit introduced in this paper has a dynamic range of 77 dB with 1.5 dB gain steps. It also achieved a gain error of less than 1.5 dB over 77 dB gain range. The VGA can operate up to 10MHz dissipating 13.8 mW from a single 1.8 V supply. The core area of the VGA fabricated in a Magnachip $0.18{\mu}m$ standard CMOS process was about $430{\mu}m{\times}350{\mu}m$. According to measurement results, we can verify that the proposed method is reasonable with regard to the enhancement of dynamic range and the better linear-in-dB characteristics.

Transceiver IC for CMOS 65nm 1-channel Beamformer of X/Ku band (X/Ku 대역 CMOS 65nm 단일 채널 빔포머 송수신기 IC )

  • Jaejin Kim;Yunghun Kim;Sanghun Lee;Byeong-Cheol Park;Seongjin Mun
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.24 no.4
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    • pp.43-47
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    • 2024
  • This paper introduces a phased-array single-channel transceiver beamformer IC built using 65nm CMOS technology, covering the 8-16 GHz range and targeting the X and Ku bands for radar and satellite communications. Each signal path in the IC features a low noise amplifier (LNA), power amplifier (PA), phase shifter (PS), and variable gain amplifier (VGA), which allow for phase and gain adjustments essential for beam steering and tapering control in typical beamforming systems. Test results show that the phase-compensated VGA offers a gain range of 15 dB with 0.25 dB increments and an RMS gain error of 0.27 dB. The active vector modulator phase shifter delivers a 360° phase range with 2.8125° steps and an RMS phase error of 3.5°.