• 제어로봇시스템학회:학술대회논문집
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• 2000.10a
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• pp.31-31
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• 2000

In this paper, Ive design and test the V/F converter for KSR-III INS using commertial INC, VFC110, AD652. The test result shows that performance of AD652 is better than that of VFC110. Through the calibration of V/F converter, we show that the designed V/F converter has a good performance and is usable for KSR-III.

• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.690-692
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• 2004

Differently from an existing analog control, because the digital control includes microprocessor basically, the digital control is enable to monitor internal parameters of DC-DC converter and to control output voltage remotely by communicating with a Windows based PC and also to monitor whether exact voltage is output or not. These things are impossible in an analog control. In this paper, a simple flyback converter is taken as a control target and is controlled by a microcontroller(TMS320F2812). This converter can make variable outputs 1.8V to 5V from 30V input voltage remotely in PC. Finally the response characteristics of a step reference voltage and in a steady state are experimented to verify the feasibility and the usefulness of this digital controlled converter.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.2 s.332
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• pp.1-8
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• 2005

An area-efficient DC-DC voltage up-converter in a poly-Si TFT technology for system-on-glass is described which provides low-ripple output. The voltage up-converter is composed of charge-pumping circuit, comparator with threshold voltage mismatch compensation, oscillator, buffer, and delay circuit for multi-phase clock generation. The low ripple output is obtained by multi-phase clocking without increasing neither clock frequency nor filtering capacitor The measurement results have shown that the ripple on the output voltage with 4-phase clocking is 123mV, while Dickson and conventional cross-coupled charge pump has 590mV and 215mV voltage ripple, respectively, for $Rout=100k\Omega$, Cout-100pF, and fclk=1MHz. The filtering capacitor required for 50mV ripple voltage is 1029pF and 575pF for Dickson and conventional cross-coupled structure, for Iout=100uA, and fclk=1MHz, while the proposed multi-phase clocking DC-DC converter with 4-phase and 6-phase clocking requires only 290pF and 157pF, respectively. The efficiency of conventional and the multi-phase clocking DC-DC converter with 4-phase clocking is $65.7\%\;and\;65.3\%$, respectively, while Dickson charge pump has $59\%$ efficiency.

• Journal of IKEEE
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• v.17 no.3
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• pp.234-240
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• 2013

This paper presents an incremental delta-sigma analog-to-digital converter (ADC) for a single-electrode capacitive touch sensor. The second-order cascade of integrators with distributed feedback (CIFB) delta-sigma modulator with 1-bit quantization was fabricated by a $0.18-{\mu}m$ CMOS process. In order to achieve a wide input range in this incremental delta-sigma analog-to-digital converter, the shielding signal and the digitally controlled offset capacitors are used in front of a converter. This circuit operated at a supply voltage of 2.6 V to 3.7 V, and is suitable for single-electrode capacitive touch sensor for ${\pm}10-pF$ input range with sub-fF resolution.

• Journal of the Korean Institute of Telematics and Electronics T
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• v.35T no.1
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• pp.48-58
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• 1998

For the purpose of designing novel capacitance pressure sensor, several effects on sensitivity such as parasitic capacitance effects, temperature/thermal drift and leakage current have to be eleiminated. This paper proposed the experimental studies on frequency compensation method by electronic circuit technique, C-V converting method with switched capacitor and C-F converting method with schmitt trigger circuit. The third interface circuit by frequency compensation method is composed to eliminate the drift and leakage component by comparision sensing frequency with reference frequency. The signal transmission is realized by digital signal to minimize the influence of noise and high resolution is obtained by means of increasing the number of digital bits. In the fabricated high performance C-V interface, the offset voltage was not appeared, and in case of voltage source, 4.0V, feed back capacitance, 10㎊, the pressure, 0~10 ㎪, the sensitivity of C-V converter is 28 ㎷/㎪.V, the temperature drift characteristic, 0.051 %F.S./$^{\circ}C$ and C-F converter shows -6.6 Hz/pa, 0.078 %F.S./$^{\circ}C$ respectively, relatively good ones.

• Publications of The Korean Astronomical Society
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• v.22 no.3
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• pp.83-87
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• 2007

We designed the Intermediate Frequency(IF) distributor for multi beam backend system and manufactured Voltage to Frequency Converter(VFC) to measure the multi-beam receiver performance. Multi beam receiver has 15 channel receivers and can get 15 spectrums at once. The multi beam receiver has more observation efficiency than single beam receiver. We manufactured the 15 IF distributors to distribute IF signal for Autocorrelation spectrometer that is radio signal processor. Also, we manufactured the VF Converter to test the performance measurement of receiver for Korea VLBI Network(KVN) system which is under-construct in Seoul, Ulsan and Jeju. As a result of performance measurement, we could obtain linearity of 99.4% on the input power vs output frequency and measured the operating range of input frequency.

• Journal of Power Electronics
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• v.17 no.4
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• pp.849-859
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• 2017

This paper illustrates the analysis and design of a multi-resonant converter applied to an electric vehicle (EV) charger. Thanks to the notch resonant characteristic, the multi-resonant converter achieve soft switching and operate with a narrowed switching frequency range even with a wide output voltage range. These advantages make it suitable for battery charging applications. With two more resonant elements, the design of the chosen converter is more complex than the conventional LLC resonant converter. However, there is not a distinct design outline for the multi-resonant converters in existing articles. According to the analysis in this paper, the normalized notch frequency $f_{r2n}$ and the second series resonant frequency $f_{r3n}$ are more sensitive to the notch capacitor ratio q than the notch inductor ratio k. Then resonant capacitors should be well-designed before the other resonant elements. The peak gain of the converter depends mainly on the magnetizing inductor ratio $L_n$ and the normalized load Q. And it requires a smaller $L_n$ and Q to provide a sufficient voltage gain $M_{max}$ at ($V_{o\_max}$, $P_{o\_max}$). However, the primary current increases with $(L_nQ)^{-1}$, and results in a low efficiency. Then a detailed design procedure for the multi-resonant converter has been provided. A 3.3kW prototype with an output voltage range of 50V to 500V dc and a peak efficiency of 97.3 % is built to verify the design and effectiveness of the converter.

• Journal of the Korea Institute of Military Science and Technology
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• v.17 no.4
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• pp.531-536
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• 2014

There are trapping and stripping methods as the technique to remove the dither motion from RLG(Ring Laser Gyro) output. V/F converter output of angular sensor to measure the dither motion is used in stripping method. But bias and scale factor error is always included in V/F converter output and is a critical limiting factor for the wide application of stripping method to RLG. Therefore there have been many researches to solve this problem. The method to accurately estimate the bias and scale factor error of V/F converter using measurements of the angular sensor acquired at data sampling rate of INS is presented in this paper. To this end, stripping technique based on model of dither motion is newly applied.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.399-400
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• 2017

본 논문에서는 불연속 캐리어 변조 방법을 이용한 매트릭스 컨버터의 전압 변조 방법을 사용하였다. 제안한 방법을 통해 출력 전압을 합성하고, 역률 1의 정현파를 갖는 입력 전류를 얻을 수 있다. 그리고 고차 고조파로 인한 문제를 방지하기 위해 입력 필터를 설계한다. 마지막으로, 제안한 방법을 유도전동기의 V/F 제어에 적용하고, PSIM을 이용한 시뮬레이션 결과를 통해 그 타당성을 검토하였다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.10a
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• pp.569-572
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• 2014

This paper presents a CMOS switched-capacitor interface circuit for MEMS capacitive sensors. It consist of a capacitance to voltage converter(CVC), a second-order ${\Sigma}{\Delta}$ modulator, and a comparator. A bias circuit is also designed to supply constant bias voltages and currents. This circuit employes the correlated-double-sampling(CDS) and chopper-stabilization(CHS) techniques to reduce low-frequency noise and offset. The designed CVC has a sensitivity of 20.53mV/fF and linearity errors less than 0.036%. The duty cycle of the designed ${\Sigma}{\Delta}$ modulator output increases about 5% as the input voltage amplitude increases by 100mV. The designed interface circuit shows linearity errors less than 0.13%, and the current consumption is 0.73mA. The proposed circuit is designed in a 0.35um CMOS process with a supply voltage of 3.3V. The size of the designed chip including PADs is $1117um{\times}983um$.