• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.11C
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• pp.1085-1097
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• 2009

We present a structure and design method of the D8PSK modem compatible with the VDL mode-2 standard and performance test results of the developed modem. In VDL mode-2, the raised cosine filter is used only in the transmitter and a general low pass filter is used in the receiver. Consequently, we can not achieve ISI reduction but can have better spectrum characteristics. Although there is 1~2 dB performance degradation with an un-matched filter compared to that with a matched filter, it is more important to minimize adjacent channel interference in narrow band communications. The transmit signal is generated digitally to avoid the problems(I/Q imbalance and DC offset etc.) of analog modulators. In addition the digital down converter using digital IF sampling technique is adopted for the receiver. This paper contains the overall configuration, design method and simulation results based in part on the previously proposed structures and algorithms. It is confirmed that the modem transmits and receives messages successfully at a speed of max. 870 km/h over ranges of up to 310 km through the ground and in-flight communication tests.

• Journal of Energy Engineering
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• v.25 no.3
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• pp.27-33
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• 2016

The heat recovery system that was applied in this study, is the energy-saving type that can produce the maximum cooling capacity less power in use. In order to have a more precise control function the temperature and humidity of the constant temperature and humidity machine, control algorithm is applied to designed a fuzzy PID controller, and the outside air compensation device (air-cooled) demonstrated excellent ability to dehumidify the moisture, $-20^{\circ}C$ in winter. High efficiency and the low-noise type sirocco fan operate quitely and designed to fit the bottom-up and top-down in accordance with the characteristics of equipment. as a result of experiment data, the conversion efficiency is 95% or more, power recovery time is within 5sec, stop delay time is within 30sec, pump down time is 10sec, pump delay time is 5sec, heating delay time is 5sec, temperature deviation is ${\pm}2^{\circ}C$ (cooling deviation: $2^{\circ}C$, Heating deviation : $2^{\circ}C$), humidity deviation is a ${\pm}5%$ (humidification deviation 3.0%, dehumidification deviation 3.0%). Recently, ubiquitous technology is important. so, the constant temperature and humidity machine designed to be able to remotely control to via the mobile phone, and more scalable to support MMI software and automatic interface. Further, the life of the parts and equipment is extended by the failure.

• Journal of the Korean Society for Railway
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• v.20 no.3
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• pp.329-338
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• 2017

A recent trend of technical development in auxiliary-power-supplies (APS) is to replace 60Hz low frequency transformers with isolated type dc/dc converters. This paper introduces the technical trend in APS structures and proposes a power converter circuit suitable for high-efficient and light-weight APS. By utilizing the resonant converter, which achieves ZCS, to reduce switching losses, various types of APS structures (1-stage and 2-stage) are reviewed, and they are verified by simulation. The full-bridge resonant LLC converter is designed with a 1-stage power converting structure; the resonant converter topology is designed with a 2-stage power converting structure that has a pre-regulator converter to compensate for the wide input voltage range. Both a step-down converter and a step-up converter are designed and compared for the pre-regulator in the 2-stage structure. Operational characteristics are compared with simulation results and loss analyses are presented to proposes appropriate system structure and topologies.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.11 s.353
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• pp.48-57
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• 2006

This work describes a 12b 200KHz 0.52mA $0.47mm^2$ algorithmic ADC for sensor applications such as motor controls, 3-phase power controls, and CMOS image sensors simultaneously requiring ultra-low power and small size. The proposed ADC is based on the conventional algorithmic architecture with recycling techniques to optimize sampling rate, resolution, chip area, and power consumption. The input SHA with eight input channels for high integration employs a folded-cascode architecture to achieve a required DC gain and a sufficient phase margin. A signal insensitive 3-D fully symmetrical layout with critical signal lines shielded reduces the capacitor and device mismatch of the MDAC. The improved switched bias power-reduction techniques reduce the power consumption of analog amplifiers. Current and voltage references are integrated on the chip with optional off-chip voltage references for low glitch noise. The employed down-sampling clock signal selects the sampling rate of 200KS/s or 10KS/s with a reduced power depending on applications. The prototype ADC in a 0.18um n-well 1P6M CMOS technology demonstrates the measured DNL and INL within 0.76LSB and 2.47LSB. The ADC shows a maximum SNDR and SFDR of 55dB and 70dB at all sampling frequencies up to 200KS/s, respectively. The active die area is $0.47mm^2$ and the chip consumes 0.94mW at 200KS/s and 0.63mW at 10KS/s at a 1.8V supply.

• Journal of Internet Computing and Services
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• v.16 no.2
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• pp.49-55
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• 2015

According to the statistics of traffic accidents over recent 5 years, traffic accidents during the night times happened more than the day times. There are various causes to occur traffic accidents and the one of the major causes is inappropriate or missing street lights that make driver's sight confused and causes the traffic accidents. In this paper, with smartphones, we designed and implemented a lane luminance measurement application which stores the information of driver's location, driving, and lane luminance into database in real time to figure out the inappropriate street light facilities and the area that does not have any street lights. This application is implemented under Native C/C++ environment using android NDK and it improves the operation speed than code written in Java or other languages. To measure the luminance of road, the input image with RGB color space is converted to image with YCbCr color space and Y value returns the luminance of road. The application detects the road lane and calculates the road lane luminance into the database sever. Also this application receives the road video image using smart phone's camera and improves the computational cost by allocating the ROI(Region of interest) of input images. The ROI of image is converted to Grayscale image and then applied the canny edge detector to extract the outline of lanes. After that, we applied hough line transform method to achieve the candidated lane group. The both sides of lane is selected by lane detection algorithm that utilizes the gradient of candidated lanes. When the both lanes of road are detected, we set up a triangle area with a height 20 pixels down from intersection of lanes and the luminance of road is estimated from this triangle area. Y value is calculated from the extracted each R, G, B value of pixels in the triangle. The average Y value of pixels is ranged between from 0 to 100 value to inform a luminance of road and each pixel values are represented with color between black and green. We store car location using smartphone's GPS sensor into the database server after analyzing the road lane video image with luminance of road about 60 meters ahead by wireless communication every 10 minutes. We expect that those collected road luminance information can warn drivers about safe driving or effectively improve the renovation plans of road luminance management.