• Title/Summary/Keyword: Unbalanced state

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Dietary Habit and Unbalanced Diet Status of Young Children by Age (유아의 나이에 따른 편식 및 식습관 실태)

  • Jung, You-Mi
    • Journal of the Korean Society of Food Culture
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    • v.34 no.5
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    • pp.587-594
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    • 2019
  • This study investigated the general information, unbalanced diet, and dietary habits of 86 children in Daegu. The research was undertaken to analyze the current state of diet and dietary habits of children, and to provide basic data for nutrition education. The results reveal that younger children have a more unbalanced diet. Children dislike side-dishes the most. Furthermore, due to the longer time taken to consume food, parents persuade children to eat quickly. Children were also determined to have a high intake of foods and drinks containing sugar; beverages containing sugar are consumed 1-2 times a week by 5-year-olds, and once daily by 6- and 7-year-olds. The results of this study can be applied to provide basic data for nutritional education, and assist in the development of dietary programs for young children.

Unbalanced Characteristics of the Superconducting Fault Current Limiters with a Single Line-to-ground Fault (1선 지락사고에 대한 초전도한류기의 불평형 특성)

  • Choi, Hyo-Sang;Lee, Na-Young;Lee, Sang-Il
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.18 no.9
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    • pp.851-855
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    • 2005
  • We investigated the unbalanced characteristics of the superconducting fault current limiters (SFCLs) based on YBCO thin films with a single line-to-ground fault. When a single line-to-ground fault occurred, the short circuit current of a fault phase increased about 6 times of transport currents after the fault onset but was effectively limited to the designed current level within 2 ms by the resistance development of the SFCL. The fault currents of the sound phases almost did not change because of their direct grounding system. The unbalanced rates of a fault phase were distributed from 6.4 to 1.4. It was found that the unbalanced rates of currents were noticeably improved within one cycle after the fault onset. We calculated the zero phase currents for a single line-to-ground fault using the balanced component analysis. The positive sequence resistance was reduced remarkably right after the fault onset but eventually approached the balanced positive resistance component prior to the system fault. This means that the system reaches almost the three-phase balanced state in about 60 ms after the fault onset at the three-phase system.

A Study of Optimal Distance between Signalized Intersections and Roundabouts Considering Unbalanced Traffic Conditions (교통량 불균형을 고려한 회전교차로와 신호교차로간 최적거리 산정에 관한 연구)

  • An, Hong Ki;Kim, Dong Sun;Bae, Gi Mok
    • KSCE Journal of Civil and Environmental Engineering Research
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    • v.41 no.6
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    • pp.707-714
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    • 2021
  • An important factor that causes delays at roundabouts is unbalanced traffic conditions. The majority of domestic studies have tendedto focus on the proportion of entering traffic rather than conflicting traffic in order to explain unbalanced traffic conditions. Also, there is scant research on the proper distance between a signalized intersection and a roundabout. In this study, therefore, unbalanced traffic conditions and optimal distance between two intersections were analyzed using SIDRA software based on the Gajwa-ro roundabout in Icheon, where unbalanced traffic conditions occur during afternoon peak hours, and its position is 295 m from a signalized intersection. It was found that a state of unbalanced traffic conditions in the form of conflicting traffic caused delays at Gajwa-ro roundabout, and the queuing length on each approach was removed when there was 850 m of distance between two intersections.

Flexible Source Current Reference Generation for Predictive Current Control of Matrix Converter under Unbalanced Input Voltages

  • Nguyen, Thanh-Luan;Lee, Hong-Hee
    • Proceedings of the KIPE Conference
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    • 2016.07a
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    • pp.359-360
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    • 2016
  • This paper presents a new predictive current control (PCC) method to achieve the coordinate control of power and current of the matrix converter under unbalanced input voltages. In order to control the power fluctuation in the input side, the flexible source current reference is generated based on the positive-negative sequence components of the input voltage. The optimal switching state to adjust source and load currents is selected by minimization the cost function which is obtained from the sum of the absolute errors between the current references and their predictive values. Simulation results are given to validate the effectiveness of the proposed PCC method.

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Enhanced Proportional-Resonant Current Controller for Unbalanced Stand-alone DFIG-based Wind Turbines

  • Phan, Van-Tung;Lee, Hong-Hee
    • Journal of Electrical Engineering and Technology
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    • v.5 no.3
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    • pp.443-450
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    • 2010
  • An enhanced control strategy for variable-speed unbalanced stand-alone doubly-fed induction generator-based wind energy conversion systems is proposed in this paper. The control scheme is applied to the rotor-side converter to eliminate stator voltage imbalance. The proposed current controller is developed based on the proportional-resonant regulator, which is implemented in the stator stationary reference frame. The resonant controller is tuned at the stator synchronous frequency to achieve zero steady-state errors in rotor currents without decomposing the positive and negative sequence components. The computational complexity of the proposed control algorithm is greatly simplified, and control performance is significantly improved. Finally, simulations and experimental results are presented to verify the feasibility and the robustness of the proposed control scheme.

Rectifier with Comparator Using Unbalanced Body Biasing to Control Comparing Time for Wireless Power Transfer (비대칭 몸체 바이어싱 비교기를 사용하여 비교시간을 조절하는 무선 전력 전송용 정류기)

  • Ha, Byeong Wan;Cho, Choon Sik
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.11
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    • pp.1091-1097
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    • 2013
  • This paper presents a rectifier with comparator using unbalanced body biasing in $0.11{\mu}m$ RF CMOS process. It is composed of MOSFETs and two comparators. The comparator is used to reduce reverse leakage current which occurs when the load voltage is higher than input voltage. For the comparator, unbalanced body biasing is devised. By using unbalanced body biasing, reference voltage for comparator changing from high state to low state is increased, and it reduces time interval for leakage current to flow. 13.56 MHz 2 Vpp signal is used for input and $1k{\Omega}$ resistor and 1 nF capacitor are used for output load for simulation and experimental environment. In simulation environment, voltage conversion efficiency(VCE) is 87.5 % and Power conversion efficiency(PCE) is 50 %. When the rectifier is measured, VCE shows 90.203 % and PCE shows 45 %.

Effective Punching Shear and Moment Capacity of Flat Plate-Column Connection with Shear Reinforcements for Lateral Loading

  • Song, Jin-Kyu;Kim, Ju-Bum;Song, Ho-Bum;Song, Jeong-Won
    • International Journal of Concrete Structures and Materials
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    • v.6 no.1
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    • pp.19-29
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    • 2012
  • In this study, three isolated interior flat slab-column connections that include three types of shear reinforcement details; stirrup, shear stud and shear band were tested under reversed cyclic lateral loading to observe the capacity of slab-column connections. These reinforced joints are 2/3 scale miniatures designed to have identical punching capacities. These experiments showed that the flexural failure mode appears in most specimens while the maximum unbalanced moment and energy absorbing capacity increases effectively, with the exception of an unreinforced standard specimen. Finally, the results of the experiments, as wel l as those of experiments previously carried out by researchers, are applied to the eccentricity shear stress model presented in ACI 318-08. The failure mode is therefore defined in this study by considering the upper limits for punching shear and unbalanced moment. In addition, an intensity factor is proposed for effective widths of slabs that carry an unbalanced moment delivered by bending.

A Rejection of Harmonic Ripples for d-q Transformation (d-q 변환에서의 고조파 맥동 제거)

  • Choi, Nam-Yerl;Lee, Chi-Hwan
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.29 no.12
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    • pp.83-87
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    • 2015
  • This paper presents a simple notch filter, which is so suitable for three-phase unbalanced and distorted power line. In the d-q synchronous transformation, three-phase unbalanced and distorted voltages generate lots of ripple voltages on d-q axes. The ripples make disturbances on controllers such as PLL of phase tracking. Unbalanced state makes ripple of double the frequency of power line. Odd harmonics 5th and 7th on the line make even 4th and 6th ripples on d-q axes due to the rotating reference frame, respectively. Cascaded two comb filters, delay lines 1/4T and 1/8T, are adopted for the ripple rejection. The filter rejects harmonics 2nd, 4th, 6th, 10th and so on. They are very effective to remove the ripples of both unbalance and distortion. The filter, implemented by two FIFOs on an experimental system, is adopted on a PLL controller of power line phase tracking. Through the simulation and experimental results, performance of the proposed comb filter has been validated.

Shunt Active Filter for Multi-Level Inverters Using DDSRF with State Delay Controller

  • Rajesh, C.R.;Umayal, S.P.
    • Journal of Power Electronics
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    • v.18 no.3
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    • pp.863-870
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    • 2018
  • The traditional power control theories for the harmonic reduction methods in multilevel inverters are found to be unreliable under unbalanced load conditions. The unreliability in harmonic mitigation is caused by voltage fluctuations, non-linear loads, the use of power switches, etc. In general, the harmonics are reduced by filters. However, such devices are an expensive way to provide a smooth and fast response to secure power systems during dynamic conditions. Hence, the Decoupled Double Synchronous Reference Frame (DDSRF) theory combined with a State Delay Controller (SDC) is proposed to achieve a harmonic reduction in power systems. The DDSRF produces a sinusoidal harmonic that is the opposite of the load harmonic. Then, it injects this harmonic into power systems, which reduces the effect of harmonics. The SDC is used to reduce the delay between the compensation time for power injection and the generation of a reference signal. The proposed technique has been simulated using MATLAB and its reliability has been verified experimentally under unbalanced conditions.

Voltage Balance Control of Cascaded H-Bridge Rectifier-Based Solid-State Transformer with Vector Refactoring Technology in αβ Frame

  • Wong, Hui;Huang, Wendong;Yin, Li
    • Journal of Power Electronics
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    • v.19 no.2
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    • pp.487-496
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    • 2019
  • For a solid-state transformer (SST), some factors, such as signal delay, switching loss and differences in the system parameters, lead to unbalanced DC-link voltages among the cascaded H-bridges (CHB). With a control method implemented in the ${\alpha}{\beta}$ frame, the DC-link voltages are balanced, and the reactive power is equally distributed among all of the H-bridges. Based on the ${\alpha}{\beta}$ frame control, the system can achieve independent active current and reactive current control. In addition, the control method of the high-voltage stage is easy to implement without decoupling or a phase-locked loop. Furthermore, the method can eliminate additional current delays during transients and get the dynamic response rapidly without an imaginary current component. In order to carry out the controller design, the vector refactoring relations that are used to balance DC-link voltages are derived. Different strategies are discussed and simulated under the unbalanced load condition. Finally, a three-cell CHB rectifier is constructed to conduct further research, and the steady and transient experimental results verify the effectiveness and correctness of the proposed method.