• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2004.07a
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• pp.474-474
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• 2004

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2004.07a
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• pp.468-468
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• 2004

• 전자공학회논문지 IE
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• v.45 no.4
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• pp.1-6
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• 2008

A fast-hopping frequency synthesizer that reduces complexity and power consumption is presented for MB-OFDM UWB applications. The proposed architecture uses 3960 MHz LC VCO, 528 MHz ring oscillator, passive mixer and LC-tuned Q-enhancement BPF to generate Band Group 1 frequencies. The adjacent channel rejection ratio is less than -40 dBc for 3432 MHz and -H dBc for 4488 MHz. A fast switching SCL-tpre MUX is used to produce the required channel output signal and it takes less than 2.2 ns for band switching. The total power consumption is 47.9 mW from a 1.8 V supply.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.11
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• pp.137-141
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• 2007

This paper proposes a cost-effective architecture design of an angle-of-arrival (AOA) estimator based on the multiple signal identification and classification (MUSIC) algerian in UWB systems adapting Multi-band OFDM (MB-OFDM) techniques with two-receive antennas. In the proposed method, by modifying the equations of algorithm in order to remove the high computational functions, the computation power can be significantly reduced without significant performance degradation. The proposed architecture is designed and verified by Verilog HDL, and implemented into 0.13um CMOS standard cell and Xilinx FPGA circuits for the estimation of hardware complexity and computation power. From the results of the implementations, we can find that the proposed circuits reduces the hardware complexity by about 43% and the estimated computation power by about 23%, respectively, compared to the architecture employing the original MUSIC algorithm.

• Journal of information and communication convergence engineering
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• v.6 no.2
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• pp.158-163
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• 2008

The MB-OFDM based UWB communication system is a personal area network specification aiming to provide 480Mbps peak data rate over 528 MHz spectrum. As the corresponding baseband modem operates at high clock rate, its complexity should be optimized for low power consumption. A set of modem design parameters is suggested including the AD bit width, the clipping level and the quantization level at the Viterbi decoder input as well as the trace-back depth of the Viterbi decoder. The data throughput is used to evaluate the performance of the receiver and a recommended set of design parameter values is presented to aid efficient modem implementation.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.533-534
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• 2006

This paper presents the architecture design of a high-speed, low-complexity 128-point radix-$2^4$ FFT processor for ultra-wideband (UWB) systems. The proposed high-speed, low-complexity FFT architecture can provide a higher throughput rate and low hardware complexity by using 2-parallel data-path scheme and single-path delay-feedback (SDF) structure. This paper presents the key ideas applied to the design of high-speed, low-complexity FFT processor, especially that for achieving high throughput rate and reducing hardware complexity. The proposed FFT processor has been designed and implemented with the 0.18-m CMOS technology in a supply voltage of 1.8 V. The throughput rate of proposed FFT processor is up to 1 Gsample/s while it requires much smaller hardware complexity.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.2 s.93
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• pp.139-143
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• 2005

In this paper, we propose the design on LNA and Down-mixer for MB-OFDM UWB using $0.18\;{\mu}m$ CMOS. LNA, Down-mixer design result shows that it covers the frequency range ken 3 GHz to 5 GHz. The LNA gain is larger than 12.8 dB, and noise figure about 2.6 dB. Double balanced differential down-mixer is designed less than 2 dB gainflatness, and it has over 30 dB LO leakage, feedthrough characteristics.

• Journal of the Semiconductor & Display Technology
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• v.9 no.2
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• pp.7-10
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• 2010

In this paper, we design a modem SoC (System on Chip) for low power consumption and high speed wireless communications. Among various schemes of high speed communications, an MB-OFDM (Multi Band-Orthogonal Frequency Division Multiplexing) UWB (Ultra-Wide-Band) chip is designed. The MB-OFDM uses wide-band frequency to provide high speed data rate. Additionally, the system imposes no interference to other services. The 90nm CMOS (Complementary Metal-Oxide Semiconductor) technology is used for the SoC design. Especially, power management mode is implemented to reduce the power consumption.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2004.07a
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• pp.403-403
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• 2004

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.6 no.3
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• pp.111-121
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• 2007

In this paper, we propose a TH-Multiband-UWB system through pulse shaping to fit in domestic UWB spectrum regulation. We propose the transmission pulse of Multi-Carrier type for pulse shaping and use Cognitive Radio to detect interfering frequency. We use Genetic Algorithm in Cognitive Radio's calculation propose and propose solution of interference problem between TH-UWB using Cognitive Radio and typical MB-OFDM UWB system or other communication systems. In this paper, we explain how Cognitive Engine detects the interfering frequency. The technique of TH-Multiband-UWB system using Cognitive Radio shows a good performance in interference condition.