• Journal of the Korea Society of Computer and Information
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• v.8 no.3
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• pp.100-106
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• 2003

This paper presents the design of a value-added ATM switch. The ATM switch ca perform CAC Processing and Firewall Processing Routine at packet-level (IP) at the ATM environment per port. The proposed two routine are integrated into the components of ATM switch. The Firewall switch employs a suggested two routine model to avoid or reduce the latency caused by filtering. Also, we suggest four classes are defined. namely, classes A, B, C, and D, which are orded from the safest to the most dangerous. The suggested model performance of ATM Firewall switch is estimated simulation in terms of the throught and latency by computer.

• The Transactions of the Korea Information Processing Society
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• v.4 no.2
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• pp.628-638
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• 1997

This paper describes an implementation of fault simulator that can switch level fault models such as transistor stuck-open and stuck-closed faults as well as stuck-at faults. It overcomes the limitation when only stuck-at faults are used in VLSI circuits. Signal flow of a transistor switch is bidirectional in its nature, but most of signal flows in a switch level circuits, about 95%, are in one direction. This fault simulator focuses on the way which changes a switch level circuit into a graph model with two directed edges. Two paths from Vdd to ground and from ground to directions. Logic simulation is performed along dominant signal flows. The switch level fault simulation estimates the dominant path by injecting switch-level fualts, and pattern vectors are used for faults simulation. Experimental results are shown to demonstrate correctness of the fault simulator.

• Korean Management Science Review
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• v.10 no.1
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• pp.139-156
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• 1993

Various ATM switches have been proposed since Asynchronous Transfer Mode (ATM) was recognized as appropriate for implementing broadband integrated services digital network (BISDN). An ATM switching network may be evaluated on two sides : traffic performances (maximum throughput, delay, and packet loss probability, etc.) and structural features (complexity, i.e. the number of switch elements necessary to construct the same size switching network, maintenance, modularity, and fault tolerance, etc.). ATM switching networks proposed to date tend to show the contrary characteristics between structural features and traffic performance. The Knockout Switch, which is well known as one of ATM switches, shows a good traffic performance but it needs so many switch elements and buffers. In this paper, we propose an input and output buffered Knockout Switch for the purpose of reducing the number of switch elements and buffers of the existing Knockout Switch. We analyze the traffic performance and the structural features of the proposed switching architecture through a discrete time Markov chain and compare with those of the existing Knockout Switch. It was found that the proposed architecture could reduce more than 40 percent of switch elements and more than 30 percent of buffers under a given requirement of cell loss probability of the switch.

• Journal of Space Technology and Applications
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• v.3 no.1
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• pp.72-85
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• 2023

Most Nanosatellites are launched in nanosatellite deployers. Nanosatellites in the deployer are turned off during launch, and they start boot sequence after deploying at their mission orbit. For this reason, nanosatellites must have deployment switch. Most of the nanosatellite deployment switch has two part, first is electric switch to boot the satellite system and second is mechanical assembly to push the switch. In most cases, electric switches are installed in the satellite main body, and the switch operations are translated via the mechanical assembly. These implementations are mechanically complicated and hard to guarantee the appropriate operation without the problems due to friction between pusher and satellite structure. This paper proposes the another implementation method of deployment switch for nanosatellites by installing the electric switch outside the main body without any kind of mechanical parts.

• Journal of Power Electronics
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• v.18 no.3
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• pp.651-661
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• 2018

This paper suggests a new non-isolated high voltage gain DC-DC converter with two switches. The proposed two-switch converter has the following characteristics: a high voltage gain, a continuous input current with a small ripple, a reduction in the size of the inductor, and a simple circuit with only a few elements. A theoretical analysis, guidelines for parameter selection, and a comparison with conventional non-isolated high step-up converters are presented. A prototype of 250 W is set up to demonstrate the correctness of the proposed converter. Results obtained from simulations and experiments are presented.

• Proceedings of the KIPE Conference
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• 2010.11a
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• pp.188-189
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• 2010

This paper proposed a new zero-voltage switching(ZVS) Two-Inductor boost converter. The conventional Two-Inductor boost converter has defect. When the switch is turned off, the high voltage spike is occurred in the switch by leakage inductance and switch parasitic capacitor. To solve this problem, the parallel resonant capacitor is added to the conventional Two-Inductor boost converter. Using quasi-resonant between parallel resonant capacitance and leakage inductance, the switches is operated soft switching. A reduction of transformer turn ratio is achieved by the voltage doubler rectifier.

• Proceedings of the KIEE Conference
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• 1996.07a
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• pp.255-258
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• 1996

A new low conduction loss, low cost zero-voltage-transition power factor correction circuit(PFC) is presented. Conventional PFC which consists of a bridge diode and a boost converter(one switch) always has three semiconductor conduction drops. Two switch type PFCs reduces conduction loss by reducing one conduction drop but the cost is increased because of increased number of active switches. The proposed PFC reduces conduction loss with one switch, which allows low cost. Conduction loss improvement is a little bit less than that of two switch type, but very close up. Operation and features are comparatively illustrated and verified by simulation and experimental results of 1 kW laboratory prototype.

• Progress in Superconductivity and Cryogenics
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• v.16 no.4
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• pp.17-20
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• 2014

We have investigated the effect of temperature and bias current on the stability of the inverse spin-switch effect in Permalloy(Py)/Nb/Permalloy pseudo spin-valves. The inverse spin-switch operates between two orientations of the ferromagnetic moments of Py layers; parallel (ON) and antiparallel-domain (OFF) state. Measuring time scans of the resistance changes between the ON and OFF state, ${\Delta}R_{ON-OFF}$, while alternating magnetic fields between the two states at various temperatures and bias currents, revealed that enhancement of ${\Delta}R_{ON-OFF}$ is a key factor to achieve successful operation of superconducting spin switch.

• Proceedings of the KIPE Conference
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• 2001.07a
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• pp.669-672
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• 2001

Generally, previous converter is divided into two categories to get high power factor and good output regulation. These two categories can be combined a category with a main switch. These converter is called Single Stage PFC Converter. This approach has good electrical characteristics of high power factor and fast output voltage regulation. The cost and size are important factor to design the converter in low power system. Even single stage can reduce the size and cost, but this approach needs to have additional circuit like control, PWM circuit. To improve these demerits, Top switch is one of good choice In reduce and size in low power single stage converter. Because it has the ability of current limit, thermal protection, oscillator, control circuit as well as a main switch ability.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.11
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• pp.2162-2167
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• 2009

A Low cost and variable speed brushless motor drive system with single switch per phase is presented. The motor drive is realized with a novel two-phase flux-reversal-free switched reluctance motor and a split AC two switch converter. The strategy of the controller and the converter for its realization are described. Comparisons between a split AC converter, asymmetric converter, split DC converter, single controllable switch converter, and N+1 converter are performed for its device rating, cost, switching losses and conduction losses, and converter efficiency. The split AC converter is analyzed and simulated to verify the characteristics of the converter circuitry and control feasibility and the simulation results are presented. The efficiency with various loads is numerically estimated and experimentally compared from viewpoint of subsystem and system in details. The focus of this paper is to compare the presented motor drive system to the asymmetric converter system throughout experiments and demonstrate single switch per phase converter having comparable efficiency as the asymmetric converter system.