• 제목/요약/키워드: Two-stage network

검색결과 333건 처리시간 0.022초

두 단계로 구성된 순환대기네트워크의 설계 (A Design Problem of a Two-Stage Cyclic Queueing Network)

  • 김성철
    • 한국경영과학회지
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    • 제31권1호
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    • pp.1-13
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    • 2006
  • In this paper we consider a design problem of a cyclic queueing network with two stages, each with a local buffer of limited capacity. Based on the theory of reversibility and product-form solution, we derive the throughput function of the network as a key performance measure to maximize. Two cases are considered. In case each stage consists of a single server, an optimal allocation policy of a given buffer capacity and work load between stages as well as the optimal number of customers is identified by exploiting the properties of the throughput function. In case each stage consists of multiple servers, the optimal policy developed for the single server case doesn't hold any more and an algorithm is developed to allocate with a small number of computations a given number of servers, buffer capacity as well as total work load and the total number of customers. The differences of the optimal policies between two cases and the implications of the results are also discussed. The results can be applied to support the design of certain manufacturing and computer/communication systems.

시변패턴 인식을 위한 2단 구조의 신경회로망 (Two stage neural network for spatio-temporal pattern recognition)

  • 임정수;이종호
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1998년도 하계학술대회 논문집 G
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    • pp.2290-2292
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    • 1998
  • This paper introduces Two-stage neural network that is capable of recognizing spatio-temporal patterns. First stage takes a spatio-temporal pattern as input and compress it into sparse spatio-temporal pattern. Second stage is for temporal pattern recognition with nonuniform inhibitory connections and different cell sizes. These are basic properties for detecting a embeded pattern in a larger pattern. The network is evaluated by computer simulation.

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2단계 네트워크 DEA를 이용한 세계 주요 공항 성과 분석 (An analysis of the performance of global major airports using two-stage network DEA model)

  • 유석천;맹결;임성묵
    • 품질경영학회지
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    • 제45권1호
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    • pp.65-92
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    • 2017
  • Purpose: The performance of global major airports is evaluated and several research questions are examined relative to the measures characterizing airport performance. Methods: The two-stage internal structure of airport performance is considered by decomposing it into physical operations and revenue generation. In the physical operations stage, operating costs, number of runways, terminal area and number of employees are used as inputs, while passenger throughput, cargo throughput and aircraft movements are taken as outputs. Subsequently, in the revenue generation stage, the outputs from the preceding stage are taken as inputs, while revenue is used as output. Results: Based upon this two-stage modeling of airport performance, a multiplicative two-stage network data envelopment analysis model is employed to calculate the overall and stage efficiencies of 59 airports using the recent data in the 2014 Airport Benchmarking Report published by the Air Transport Research Society. Several internal and external factors are also considered such as airport size, airport geographical location, proportion of international passengers, ownership (listed or not) and management style, and statistical analysis is performed to examine their impacts on airport performance. Conclusion: It is shown that the airports exhibit statistically significant difference across regions, and also some statistically significant factors affecting airport performance are identified.

Two-Stage Model for Security Network-Constrained Market Auction in Pool-Based Electricity Market

  • Kim, Mun-Kyeom
    • Journal of Electrical Engineering and Technology
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    • 제12권6호
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    • pp.2196-2207
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    • 2017
  • This paper presents a two-stage market auction model in a pool-based electricity market, which explicitly takes into account the system network security. The security network-constrained market auction model considers the use of corrective control to yield economically efficient actions in the post-contingency state, while ensuring a certain security level. Under this framework, the proposed model shows not only for quantifying the correlation between secure system operation and efficient market operation, but also for providing transparent information on the pricing system security for market participants. The two-stage market auction procedure is formulated using Benders decomposition (BD). In the first stage, the market participants bid in the market for maximizing their profit, and the independent system operator (ISO) clears the market based on social welfare maximization. System network constraints incorporating post-contingency control actions are described in the second stage of the market auction procedure. The market solutions, along with the BD, yield nodal spot prices (NSPs) and nodal congestion prices (NCPs) as byproducts of the proposed two-stage market auction model. Two benchmark systems are used to test and demonstrate the effectiveness of the proposed model.

거리 사상 함수 및 RBF 네트워크의 2단계 알고리즘을 적용한 서류 레이아웃 분할 방법 (A Two-Stage Document Page Segmentation Method using Morphological Distance Map and RBF Network)

  • 신현경
    • 한국정보과학회논문지:소프트웨어및응용
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    • 제35권9호
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    • pp.547-553
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    • 2008
  • 본 논문에서는 2 단계 서류 레이아웃 분할 방법을 제안한다. 서류 분할의 1 차 단계는 top-down 계열의 영역 추출로서 모폴로지 기반의 거리 함수를 사용하여 주어진 영상 데이타를 사각형 영역들로 분할한다. 거리 사상 함수를 통한 예비 결과는 성능 개선을 위한 2 차 단계의 입력 변수로 작용한다. 서류 분할의 2차 단계로서 기계 학습 이론을 적용한다. 통계 모델을 따르는 RBF 신경망을 선택하였고, 은닉 층의 설계를 위해 코호넨 네트워크의 자기 조직화 성격을 활용한 데이타 군집화 기법을 기반으로 하였다. 본 논문에서는 300개의 영상에서 추출된 영역 데이타를 통해 학습된 신경망이 1차 단계에서 도출된 예비 결과를 개선함을 연구 결과로 제시하였다.

A low-cost compensated approximate multiplier for Bfloat16 data processing on convolutional neural network inference

  • Kim, HyunJin
    • ETRI Journal
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    • 제43권4호
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    • pp.684-693
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    • 2021
  • This paper presents a low-cost two-stage approximate multiplier for bfloat16 (brain floating-point) data processing. For cost-efficient approximate multiplication, the first stage implements Mitchell's algorithm that performs the approximate multiplication using only two adders. The second stage adopts the exact multiplication to compensate for the error from the first stage by multiplying error terms and adding its truncated result to the final output. In our design, the low-cost multiplications in both stages can reduce hardware costs significantly and provide low relative errors by compensating for the error from the first stage. We apply our approximate multiplier to the convolutional neural network (CNN) inferences, which shows small accuracy drops with well-known pre-trained models for the ImageNet database. Therefore, our design allows low-cost CNN inference systems with high test accuracy.

엣지 컴퓨팅 환경에서 적용 가능한 딥러닝 기반 라벨 검사 시스템 구현 (Implementation of Deep Learning-based Label Inspection System Applicable to Edge Computing Environments)

  • 배주원;한병길
    • 대한임베디드공학회논문지
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    • 제17권2호
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    • pp.77-83
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    • 2022
  • In this paper, the two-stage object detection approach is proposed to implement a deep learning-based label inspection system on edge computing environments. Since the label printed on the products during the production process contains important information related to the product, it is significantly to check the label information is correct. The proposed system uses the lightweight deep learning model that able to employ in the low-performance edge computing devices, and the two-stage object detection approach is applied to compensate for the low accuracy relatively. The proposed Two-Stage object detection approach consists of two object detection networks, Label Area Detection Network and Character Detection Network. Label Area Detection Network finds the label area in the product image, and Character Detection Network detects the words in the label area. Using this approach, we can detect characters precise even with a lightweight deep learning models. The SF-YOLO model applied in the proposed system is the YOLO-based lightweight object detection network designed for edge computing devices. This model showed up to 2 times faster processing time and a considerable improvement in accuracy, compared to other YOLO-based lightweight models such as YOLOv3-tiny and YOLOv4-tiny. Also since the amount of computation is low, it can be easily applied in edge computing environments.

대용량 2단 ATM 스위치와 그 특성에 관한 연구 (A Study on the Two-Stage ATM Switch and Its Traffic Characteristics)

  • 송광석;김윤철;한치문;이태원
    • 전자공학회논문지A
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    • 제29A권7호
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    • pp.19-30
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    • 1992
  • In this paper, a new large scale ATM switch architecture for Broadband ISDN is presented and its performance is analyzed mathematically. The proposed two-stage ATM switch consists of a sorting network and several unit switches. The proposed switch is self-routing and nonlocking. Its maximum through put is 100% without speed up which other output buffered switch needs. The hardware complexity mainly depends on that of a sorting network, but sorting network is easy to be implemented to VLSI because of its regularity in the structure.

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2단 CMOS Class E RF 전력증폭기 (Two Stage CMOS Class E RF Power Amplifier)

  • 최혁환;김성우;임채성;오현숙;권태하
    • 한국정보통신학회논문지
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    • 제7권1호
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    • pp.114-121
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    • 2003
  • 본 연구에서는 ISM 밴드의 블루투스 응용을 위한 2단 CMOS E급 전력증폭기를 설계하였다. 제안된 전력증폭기는 2.4GHz의 주파수에서 동작하며 0.35um CMOS기술과 Hspice 툴을 이용하여 설계 및 시뮬레이션 되었고 Mentor 툴을 이용하여 레이아웃되었다. 전력증폭기의 구조는 간단한 2단으로 설계하였다. 첫단에는 입력매칭네트웍과 전압증폭단인 전치증폭기로, 둘째단은 최대효율과 최대전력을 위한 E급 전력증폭단과 출력 매칭네트웍으로 구성하였다 내부단은 가장 간단한 구조의 L구조의 매칭네트웍을 이용하여 제작될 전체칩의 크기를 최소화하였다. 본 연구에서 제안된 전력증폭기는 2.4GHz의 동작주파수와 2.5V의 낮은 공급전압에서 25.4dBm의 출력전력과 약 39%의 전력부가효율을 얻을 수 있었다. 패드를 제외한 칩의 크기는 약 0.9${\times}$0.8(mm2)였다.

FTSnet: 동작 인식을 위한 간단한 합성곱 신경망 (FTSnet: A Simple Convolutional Neural Networks for Action Recognition)

  • 조옥란;이효종
    • 한국정보처리학회:학술대회논문집
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    • 한국정보처리학회 2021년도 추계학술발표대회
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    • pp.878-879
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    • 2021
  • Most state-of-the-art CNNs for action recognition are based on a two-stream architecture: RGB frames stream represents the appearance and the optical flow stream interprets the motion of action. However, the cost of optical flow computation is very high and then it increases action recognition latency. We introduce a design strategy for action recognition inspired by a two-stream network and teacher-student architecture. There are two sub-networks in our neural networks, the optical flow sub-network as a teacher and the RGB frames sub-network as a student. In the training stage, we distill the feature from the teacher as a baseline to train student sub-network. In the test stage, we only use the student so that the latency reduces without computing optical flow. Our experiments show that its advantages over two-stream architecture in both speed and performance.