• Journal of the Korean Operations Research and Management Science Society
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• v.31 no.1
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• pp.1-13
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• 2006

In this paper we consider a design problem of a cyclic queueing network with two stages, each with a local buffer of limited capacity. Based on the theory of reversibility and product-form solution, we derive the throughput function of the network as a key performance measure to maximize. Two cases are considered. In case each stage consists of a single server, an optimal allocation policy of a given buffer capacity and work load between stages as well as the optimal number of customers is identified by exploiting the properties of the throughput function. In case each stage consists of multiple servers, the optimal policy developed for the single server case doesn't hold any more and an algorithm is developed to allocate with a small number of computations a given number of servers, buffer capacity as well as total work load and the total number of customers. The differences of the optimal policies between two cases and the implications of the results are also discussed. The results can be applied to support the design of certain manufacturing and computer/communication systems.

• Proceedings of the KIEE Conference
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• 1998.07g
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• pp.2290-2292
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• 1998

This paper introduces Two-stage neural network that is capable of recognizing spatio-temporal patterns. First stage takes a spatio-temporal pattern as input and compress it into sparse spatio-temporal pattern. Second stage is for temporal pattern recognition with nonuniform inhibitory connections and different cell sizes. These are basic properties for detecting a embeded pattern in a larger pattern. The network is evaluated by computer simulation.

• Journal of Korean Society for Quality Management
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• v.45 no.1
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• pp.65-92
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• 2017

Purpose: The performance of global major airports is evaluated and several research questions are examined relative to the measures characterizing airport performance. Methods: The two-stage internal structure of airport performance is considered by decomposing it into physical operations and revenue generation. In the physical operations stage, operating costs, number of runways, terminal area and number of employees are used as inputs, while passenger throughput, cargo throughput and aircraft movements are taken as outputs. Subsequently, in the revenue generation stage, the outputs from the preceding stage are taken as inputs, while revenue is used as output. Results: Based upon this two-stage modeling of airport performance, a multiplicative two-stage network data envelopment analysis model is employed to calculate the overall and stage efficiencies of 59 airports using the recent data in the 2014 Airport Benchmarking Report published by the Air Transport Research Society. Several internal and external factors are also considered such as airport size, airport geographical location, proportion of international passengers, ownership (listed or not) and management style, and statistical analysis is performed to examine their impacts on airport performance. Conclusion: It is shown that the airports exhibit statistically significant difference across regions, and also some statistically significant factors affecting airport performance are identified.

• Journal of Electrical Engineering and Technology
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• v.12 no.6
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• pp.2196-2207
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• 2017

This paper presents a two-stage market auction model in a pool-based electricity market, which explicitly takes into account the system network security. The security network-constrained market auction model considers the use of corrective control to yield economically efficient actions in the post-contingency state, while ensuring a certain security level. Under this framework, the proposed model shows not only for quantifying the correlation between secure system operation and efficient market operation, but also for providing transparent information on the pricing system security for market participants. The two-stage market auction procedure is formulated using Benders decomposition (BD). In the first stage, the market participants bid in the market for maximizing their profit, and the independent system operator (ISO) clears the market based on social welfare maximization. System network constraints incorporating post-contingency control actions are described in the second stage of the market auction procedure. The market solutions, along with the BD, yield nodal spot prices (NSPs) and nodal congestion prices (NCPs) as byproducts of the proposed two-stage market auction model. Two benchmark systems are used to test and demonstrate the effectiveness of the proposed model.

• Journal of KIISE:Software and Applications
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• v.35 no.9
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• pp.547-553
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• 2008

We propose a two-stage document layout segmentation method. At the first stage, as top-down segmentation, morphological distance map algorithm extracts a collection of rectangular regions from a given input image. This preliminary result from the first stage is employed as input parameters for the process of next stage. At the second stage, a machine-learning algorithm is adopted RBF network, one of neural networks based on statistical model, is selected. In order for constructing the hidden layer of RBF network, a data clustering technique bared on the self-organizing property of Kohonen network is utilized. We present a result showing that the supervised neural network, trained by 300 number of sample data, improves the preliminary results of the first stage.

• ETRI Journal
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• v.43 no.4
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• pp.684-693
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• 2021

This paper presents a low-cost two-stage approximate multiplier for bfloat16 (brain floating-point) data processing. For cost-efficient approximate multiplication, the first stage implements Mitchell's algorithm that performs the approximate multiplication using only two adders. The second stage adopts the exact multiplication to compensate for the error from the first stage by multiplying error terms and adding its truncated result to the final output. In our design, the low-cost multiplications in both stages can reduce hardware costs significantly and provide low relative errors by compensating for the error from the first stage. We apply our approximate multiplier to the convolutional neural network (CNN) inferences, which shows small accuracy drops with well-known pre-trained models for the ImageNet database. Therefore, our design allows low-cost CNN inference systems with high test accuracy.

• IEMEK Journal of Embedded Systems and Applications
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• v.17 no.2
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• pp.77-83
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• 2022

In this paper, the two-stage object detection approach is proposed to implement a deep learning-based label inspection system on edge computing environments. Since the label printed on the products during the production process contains important information related to the product, it is significantly to check the label information is correct. The proposed system uses the lightweight deep learning model that able to employ in the low-performance edge computing devices, and the two-stage object detection approach is applied to compensate for the low accuracy relatively. The proposed Two-Stage object detection approach consists of two object detection networks, Label Area Detection Network and Character Detection Network. Label Area Detection Network finds the label area in the product image, and Character Detection Network detects the words in the label area. Using this approach, we can detect characters precise even with a lightweight deep learning models. The SF-YOLO model applied in the proposed system is the YOLO-based lightweight object detection network designed for edge computing devices. This model showed up to 2 times faster processing time and a considerable improvement in accuracy, compared to other YOLO-based lightweight models such as YOLOv3-tiny and YOLOv4-tiny. Also since the amount of computation is low, it can be easily applied in edge computing environments.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.7
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• pp.19-30
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• 1992

In this paper, a new large scale ATM switch architecture for Broadband ISDN is presented and its performance is analyzed mathematically. The proposed two-stage ATM switch consists of a sorting network and several unit switches. The proposed switch is self-routing and nonlocking. Its maximum through put is 100% without speed up which other output buffered switch needs. The hardware complexity mainly depends on that of a sorting network, but sorting network is easy to be implemented to VLSI because of its regularity in the structure.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.1
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• pp.114-121
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• 2003

In this paper, low voltage and two stage CMOS Class E RF power amplifier for ISM(Industrial/Scientific/Medical) Open Band is presented. The power amplifier operates at 2.4GHz frequency, and is designed and simulated with a 0.35um CMOS technology and HSPICE simulator. The power amplifier is simple structure of two stage Class E power amplifier. The design procedure determing matching network was presented. The power amplifier is composed of input stage matching network, preamplifier, interstage matching network, power amplifier, and output stage matching network. The matching networks of input stage and interstage were constituted by pi($\pi$) type and L type respectively. At 2.4GHz operating frequency, and with a 2.5V supply voltage, the power amplifier delivers 23dBm output power to a 50${\Omega}$ load with 39% power added efficiency(PAE).

• Proceedings of the Korea Information Processing Society Conference
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• 2021.11a
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• pp.878-879
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• 2021

Most state-of-the-art CNNs for action recognition are based on a two-stream architecture: RGB frames stream represents the appearance and the optical flow stream interprets the motion of action. However, the cost of optical flow computation is very high and then it increases action recognition latency. We introduce a design strategy for action recognition inspired by a two-stream network and teacher-student architecture. There are two sub-networks in our neural networks, the optical flow sub-network as a teacher and the RGB frames sub-network as a student. In the training stage, we distill the feature from the teacher as a baseline to train student sub-network. In the test stage, we only use the student so that the latency reduces without computing optical flow. Our experiments show that its advantages over two-stream architecture in both speed and performance.