• Title/Summary/Keyword: Tunneling Current

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Properties and Applications of Magnetic Tunnel Junctions

  • Reiss, G.;Bruckl, H.;Thomas, A.;Justus, M.;Meyners, D.;Koop, H.
    • Journal of Magnetics
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    • v.8 no.1
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    • pp.24-31
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    • 2003
  • The discoveries of antiferromagnetic coupling in Fe/Cr multilayers by Grunberg, the Giant Magneto Resistance by Fert and Grunberg and a large tunneling magnetoresistance at room temperature by Moodera have triggered enormous research on magnetic thin films and magnetoelectronic devices. Large opportunities are especially opened by the spin dependent tunneling resistance, where a strong dependence of the tunneling current on an external magnetic field can be found. We will briefly address important basic properties of these junctions like thermal, magnetic and dielectric stability and discuss scaling issues down to junction sizes below 0.01 $\mu\textrm{m}$$^2$with respect to single domain behavior, switching properties and edge coupling effects. The second part will give an overview on applications beyond the use of the tunneling elements as storage cells in MRAMs. This concerns mainly field programmable logic circuits, where we demonstrate the clocked operation of a programmed AND gate. The second 'unconventional' feature is the use as sensing elements in DNA or protein biochips, where molecules marked magnetically with commercial beads can be detected via the dipole stray field in a highly sensitive and relatively simple way.

Performance Comparison of the SG-TFET and DG-TFET (SG-TFET와 DG-TFET의 구조에 따른 성능 비교)

  • Jang, Ho-Yeong;Ahn, Tae-Jun;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.05a
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    • pp.445-447
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    • 2016
  • Performance comparison between Tunneling Field-Effect Transistors (TFETs) was examined when three types of device parameter of double-gate TFET (DG-TFET) and single-gate TFET (SG-TFET) are varied. When the channel length is over 30 nm, silicon thickness is below 20 nm, and a gate insulator thickness decreases, the performance of $I_{on}$ and SS in SG-TFETs and DG-TFETs enhances. It shows that the performance of the DG-TFETs is improved than that of SG-TFETs at three types of device parameter.

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Three-dimensional numerical parametric study of tunneling effects on existing pipelines

  • Shi, Jiangwei;Wang, Jinpu;Ji, Xiaojia;Liu, Huaqiang;Lu, Hu
    • Geomechanics and Engineering
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    • v.30 no.4
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    • pp.383-392
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    • 2022
  • Although pipelines are composed of segmental tubes commonly connected by rubber gasket or push-in joints, current studies mainly simplified pipelines as continuous structures. Effects of joints on three-dimensional deformation mechanisms of existing pipelines due to tunnel excavation are not fully understood. By conducting three-dimensional numerical analyses, effects of pipeline burial depth, tunnel burial depth, volume loss, pipeline stiffness and joint stiffness on bending strain and joint rotation of existing pipelines are explored. By increasing pipeline burial depth or decreasing tunnel cover depth, tunneling-induced pipeline deformations are substantially increased. As tunnel volume loss varies from 0.5% to 3%, the maximum bending strains and joint rotation angles of discontinuous pipelines increase by 1.08 and 9.20 times, respectively. By increasing flexural stiffness of pipe segment, a dramatic increase in the maximum joint rotation angles is observed in discontinuous pipelines. Thus, the safety of existing discontinuous pipelines due to tunnel excavation is controlled by joint rotation rather than bending strain. By increasing joint stiffness ratio from 0.0 (i.e., completely flexible joints) to 1.0 (i.e., continuous pipelines), tunneling-induced maximum pipeline settlements decrease by 22.8%-34.7%. If a jointed pipeline is simplified as a continuous structure, tunneling-induced settlement is thus underestimated, but bending strain is grossly overestimated. Thus, joints should be directly simulated in the analysis of tunnel-soil-pipeline interaction.

Field-effect Ion-transport Devices with Carbon Nanotube Channels: Schematics and Simulations

  • Kwon Oh Kuen;Kwon Jun Sik;Hwang Ho Jung;Kang Jeong Won
    • Proceedings of the IEEK Conference
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    • 2004.08c
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    • pp.787-791
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    • 2004
  • We investigated field-effect ion-transport devices based on carbon nanotubes by using classical molecular dynamics simulations under applied external force fields, and we present model schematics that car be applied to the nanoscale data storage devices and unipolar ionic field-effect transistors. As the applied external force field is increased, potassium ions rapidly flow through the nanochannel. Under low external force fields, ther nal fluctuations of the nanochannels affect tunneling of the potassium ions whereas the effects of thermal fluctuations are negligible under high external force fields. Since the electric current conductivity increases when potassium ions are inserted into fullerenes or carbon nanotubes, the field effect due to the gate, which can modify the position of the potassium ions, changes the tunneling current between the drain and the source.

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Characterization of CdS Thin Films and CdS/CdTe Heterojunction Prepared by Different Techniques (CdS 박막의 제조 방법에 따른 물성 및 CdS/CdTe 이종접합의 전기적 특성 분석)

  • Lee, Jae-Hyeong
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.18 no.3
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    • pp.199-205
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    • 2005
  • Polycrystalline cadmium sulfide(CdS) thin films were deposited on glass substrate by chemical bath deposition(CBD) and vacuum evaporation (VE) techniques. VE-CdS films consisted primarily of hexagonal phase, whereas CBD CdS films containing primarily the cubic form. VE-grown films were shown to have better crystallinity than CBD-grown films. The grain size of the CBD films is smaller than the ones of VE films. VE-CdS films exhibited relatively high transmittance in the above-gap region and band gap compared with CBD films. However, CdTe solar cells with these low quality CBD-CdS layers yield higher and more stable characteristics. Current-voltage-temperature measurements showed that the current transport for both cells was controlled by both tunneling and interface recombination but the cells with CBD-CdS displayed less tunneling.

Ferromagnetic Heterostructures based on Semiconductors

  • Tanaka, M.;Sugahara, S.;Nazmul, A.M.
    • Proceedings of the Korean Magnestics Society Conference
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    • 2003.06a
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    • pp.262-262
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    • 2003
  • Creating a new spin-based electronics (often called "spin-electronics" or "spintronics") is one of the hot topics in the current solid-state physics and electronics research. In order to utilize the spin degree of freedom in solids, particularly in semiconductors the current electronics is based on, we need to fabricate appropriate materials, understand and control the spin-dependent phenomena. In this ta1k, I will review the recent deve1opments of epitaxial ferromagnetic hetero structures based on semiconductors towards spintronics. This includes the semiconductor materials and hetero structures having high ferromagnetic transition temperature (III-V based alloy magnetic semiconductors, Mn-delta-doped magnetic semiconductors, and related heterostructures), spin-dependent transport and tunneling, and their device applications (tunneling magnetoresistance devices and three-terminal devices). Future issues and prospects will be also discussed.

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Study for Digital Logic Circuit Using Resonant Tunneling Diodes (공명투과다이오드를 이용한 논리회로의 응용 연구)

  • 추혜용;박평운;이창희;이일항
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.2
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    • pp.75-80
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    • 1994
  • AlAs/GaAs/AlAs RTDs(Resonant Tunneling Diodes) are fabricated and current-voltage properties of them are measured. At room temperature, peak to valley ratio is 2.4 NOT.AND.OR logic gates and Flip-Flop are fabricated using the bistable characteristics of RTDs. Although NOT.AND.OR logic gates need 5~8 transistors. only one RTD is sufficient to fabricate the logic gates. Since the switching time is very short(<10$^12$sec), it is possible to drive the semiconductor circuits fast and integrate them very large. And it is convinced the possibility of integrating RTDs to multilevel logic circuits by observing two peaks of similar current in the serial connection of two RTDs.

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Analytical Surface Potential Model with TCAD Simulation Verification for Evaluation of Surrounding Gate TFET

  • Samuel, T.S. Arun;Balamurugan, N.B.;Niranjana, T.;Samyuktha, B.
    • Journal of Electrical Engineering and Technology
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    • v.9 no.2
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    • pp.655-661
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    • 2014
  • In this paper, a new two dimensional (2D) analytical modeling and simulation for a surrounding gate tunnel field effect transistor (TFET) is proposed. The Parabolic approximation technique is used to solve the 2-D Poisson equation with suitable boundary conditions and analytical expressions for surface potential and electric field are derived. This electric field distribution is further used to calculate the tunneling generation rate and thus we numerically extract the tunneling current. The results show a significant improvement in on-current characteristics while short channel effects are greatly reduced. Effectiveness of the proposed model has been confirmed by comparing the analytical results with the TCAD simulation results.

Electrical Characteristics of Self-Assembled Organic Thin Films Using Ultra-High Vacuum Scanning Tunneling Microscopy (UHV STM을 이용한 유기 초박막의 전기적 특성 연구)

  • Kim, Seung-Un;Shin, Hoon-Kyu;Kwon, Young-Soo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.11a
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    • pp.108-111
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    • 2003
  • Currently, molecular devices are reported utilizing active self-assembled monolayers containing the nitro group as the active component, which has active redox centers[1]. We confirm the electrical properties of 4,4-di(ethynylphenyl)-2'-nitro-1-benzenethiolate. To deposit the SAM layer onto gold electrode, we transfer the prefabricated Au(111) substrates into a 1mM self-assembly molecules in THF solution. Au(111) substrates were prepared by ion beam sputtering method of gold onto the silicon wafer. As a result, we measured current-voltage curve using ultra high vacuum scanning tunneling microscopy (UHV STM), I-V curve also clearly shows several current peaks between the negative bias region (-0.3958V) and the positive bias region (0.4658V), respectively.

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Electrical Properties of TiO2 Thin Film and Junction Analysis of a Semiconductor Interface

  • Oh, Teresa
    • Journal of information and communication convergence engineering
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    • v.16 no.4
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    • pp.248-251
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    • 2018
  • To research the characteristics of $TiO_2$ as an insulator, $TiO_2$ films were prepared with various annealing temperatures. It was researched the currents of $TiO_2$ films with Schottky barriers in accordance with the contact's properties. The potential barrier depends on the Schottky barrier and the current decreases with increasing the potential barrier of $TiO_2$ thin film. The current of $TiO_2$ film annealed at $110^{\circ}C$ was the lowest and the carrier density was decreased and the resistivity was increased with increasing the hall mobility. The Schottky contact is an important factor to become semiconductor device, the potential barrier is proportional to the hall mobility, and the hall mobility increased with increasing the potential barrier and became more insulator properties. The reason of having the high mobility in the thin films in spite of the lowest carrier concentration is that the conduction mechanism in the thin films is due to the band-to-band tunneling phenomenon of electrons.