• 제목/요약/키워드: Triple modular redundancy (TMR)

검색결과 20건 처리시간 0.029초

비동기 3중화 제어기의 성능분석을 위한 모델링 기법 (A Modeling Technique for Performance Evaluation of Asynchronous TMR Controller)

  • 김석주;권순만;김종문;김국헌
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2000년도 하계학술대회 논문집 D
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    • pp.2684-2686
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    • 2000
  • This paper describes a preliminary study on a modeling technique for control performance evaluation of asynchronous TMR(Triple Modular Redundancy) controller. Hybrid system modeling is applied to TMR controller performance evaluation and mixed logical dynamical system description is used to model the behavior of majority voter in the controller. Windup and bumpless transfer problems in redundancy controls are also mentioned.

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TMR 시스템 기반의 Checkpointing 기법에 관한 연구 (A Study for Checkpointing Schemes based on a TMR System)

  • 김태욱;강명석;김학배
    • 한국정보처리학회:학술대회논문집
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    • 한국정보처리학회 2003년도 추계학술발표논문집 (상)
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    • pp.397-400
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    • 2003
  • TMR(Triple Modular redundancy)은 공간여분(W/H 및 S/W)을 정적으로 활용하는 가장 간단한 구조를 지닌 대표적인 고장포용 기법중의 하나이다. TMR 구조 고장시 TMR 시스템 고장복구를 위해 잘못된 결과를 가지고 있는 프로그램의 일부분을 재실행 또는 프로그래밍 전체를 재시작하는 기법을 적용하는 것은 일반적으로 상당한 시간을 필요로 한다. 이러한 단점을 극복하기 위해 본 논문에서는 TMR 고장을 효과적으로 복구하기 위해 또 다른 형태의 시간여분 기법인 rollback과 rol1-forward 기법에 checkpoint들을 적용하여 처리하는 시간 및 공간여분을 혼용하는 기법을 제안하였다.

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TMR 구조에서의 백업과 복원을 활용한 안정성 및 신뢰성 향상 임베디드 시스템 구현 (Implementation of Improved safety and reliability Embedded system using Backup and Restore of TMR Architecture)

  • 박주열;이준환;김효상;김봉택;정기석
    • 한국철도학회:학술대회논문집
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    • 한국철도학회 2011년도 정기총회 및 추계학술대회 논문집
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    • pp.188-194
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    • 2011
  • The purpose of this paper is to explain the implementation method in order to enhance stability and reliability of embedded system. In this research, Texas Instrument (TI)'s TMS570 MCU(Micro Controller Unit) is used to satisfy the standard of stability that is IEC 61508. IEC 61508 suggest SIL(Safety Integrity Level) from 1 to 4 and TMS570 is satisfied SIL3. Also, TMS570 can provide several stability functions can be used in realtime system. To use such functions, this paper suggest the solution about the defect that can be used in realtime system. In basic way TMR(Triple Modular Redundancy) suggested in addition to explain about the way to improve safety and reliability. Also this paper will suggest the method that reinforce the stability of calculation by using multiplex voter and memory.

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터빈제어용 3중화 디지털 제어시스템의 구성방식에 관한 연구 (A Study on Configuration Method of TMR Control System for Turbine Control)

  • 정창기;신윤오
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1999년도 하계학술대회 논문집 B
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    • pp.731-733
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    • 1999
  • Distributed Control System has been used for large scale and critical system control such as aerospace industries, chemical and power plant and so on. It is very impotant factors for design of the control system to be reliable and fault-tolerant. These control systems have backup or redundant processing modules for minimizing the time of failure and improving reliability. But such methods have changeover duration from faulty module to healthy one. During that interval, feedback control loop raises bumper and performance of the system become worse. TMR(Triple Modular Redundancy) control system is one of the best reliable ones that can overcome such a mortal drawback. This paper analyzes the components of TMR system functionally and proposes practical and cost effective configuration method for turbine control of thermal power plant.

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고속 데이터 처리를 위한 과학기술위성 3호 대용량 메모리 유닛의 개념 설계 (The Conceptual Design of Mass Memory Unit for High Speed Data Processing in the STSAT-3)

  • 서인호;오대수;명로훈
    • 한국항공우주학회지
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    • 제38권4호
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    • pp.389-394
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    • 2010
  • 본 연구에서는 과학기술위성 2호와 비교 했을 때 고속의 데이터를 처리하고 대용량의 메모리를 관리해야하는 요구사항을 만족하기 위한 과학기술위성 3호 대용량 메모리 유닛의 설계 내용에 대해서 나타내었다. 이러한 요구사항을 만족하기 위해서, 두 개의 탑재체에서 각각 최대 100Mbps로 수신되는 데이터와 32Gb의 대용량 메모리를 처리하고 관리하는 역할을 FPGA가 직접 담당 하도록 설계하였다. 사용된 FPGA는 동작 속도가 빠르고 게이트 수가 많은 SRAM 기반의 Xilinx FPGA로써 우주 환경에서의 SEU를 극복하기 위해서 TMR 기법과 스크러빙 기법을 적용하고자 한다.

고신뢰도 안전등급 제어기기 개발 (Development of the High Reliable Safety PLC for the Nuclear Power Plants)

  • 손광섭;김동훈;손철웅
    • 전기학회논문지
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    • 제62권1호
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    • pp.109-119
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    • 2013
  • This paper presents the design of the Safety Programmable Logic Controller (SPLC) used in the Nuclear Power Plants, an analysis of a reliability for the SPLC using a markov model. The architecture of the SPLC is designed to have the multiple modular redundancy composed of the Dual Modular Redundancy(DMR) and the Triple Modular Redundancy(TMR). The operating system of the SPLC is designed to have the non-preemptive state based scheduler and the supervisory task managing the sequential scheduling, timing of tasks, diagnostic and security. The data communication of the SPLC is designed to have the deterministic state based protocol, and is designed to satisfy the effective transmission capacity of 20Mbps. Using Markov model, the reliability of SPLC is analyzed, and assessed. To have the reasonable reliability such as the mean time to failure (MTTF) more than 10,000 hours, the failure rate of each SPLC module should be less than $2{\times}10^{-5}$/hour. When the fault coverage factor (FCF) is increased by 0.1, the MTTF is improved by about 4 months, thus to enhance the MTTF effectively, it is needed that the diagnostic ability of each SPLC module should be strengthened. Also as the result of comparison the SPLC and the existing safety grade PLCs, the reliability and MTTF of SPLC is up to 1.6-times and up to 22,000 hours better than the existing PLCs.

철도시스템의 안전성 향상을 위한 주연산보드 구현 (Implementation of Main Computation Board for Safety Improvement of railway system)

  • 박주열;김효상;이준환;김봉택;정기석
    • 한국철도학회:학술대회논문집
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    • 한국철도학회 2011년도 춘계학술대회 논문집
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    • pp.1195-1201
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    • 2011
  • Since the release of safety standard IEC 61508 which defines functional safety of electronic safety-related systems, SIL(Safety Integrity Level) certification for railway systems has gained lots of attention lately. In this paper, we propose a new design technique of the computer board for train control systems with high reliability and safety. The board is designed with TMR(Triple Modular Redundancy) using a certified SIL3 Texas Instrument(TI)'s TMS570 MCU(Micro-Controller Unit) to guarantee safety and reliability. TMR for the control device is implemented on FPGA(Field Programmable Gate Array) which integrates a comparator, a CAN(Controller Area Network) communication module, built-in self-error checking, error discriminant function to improve the reliability of the board. Even if a malfunction of a processing module occurs, the safety control function based on the proposed technique lets the system operate properly by detecting and masking the malfunction. An RTOS (Real Time Operation System) called FreeRTOS is ported on the board so that reliable and stable operation and convenient software development can be provided.

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삼중화된 회로에서의 결함 감지를 위한 방법에 관한 연구 (A Study on Fault Detection Scheme on TMRed Circuits)

  • 강동수;이종길;장경선
    • 한국정보과학회:학술대회논문집
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    • 한국정보과학회 2011년도 한국컴퓨터종합학술대회논문집 Vol.38 No.1(B)
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    • pp.313-316
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    • 2011
  • SRAM-based FPGAs are very sensitive to single event upset(SEU) induced by space irradiation. To mitigate SEU effects, space applications employ some mitigation schemes. The triple modular redundancy(TMR) is a well-known mitigation scheme. It uses one or three voters as well as three identical blocks performing the same work. The voters can mask out one error in the outputs from the three replicated blocks. One SEU error in TMRed circuits can be masked but it needs to be detected for some reasons such as to analyze the SEU effects in the satellite or to recover the circuits from the error before additional error occur. In this paper, we developed a fault detection circuit and reporting system to detect a fault on the TMRed circuits. To verify our error detection circuit and reporting circuit, we performed an irradiation test at MC-50 Cyclotron. Experimental results showed that error detection circuit can detect a fault on the TMRed test circuit in radiation environment.

다중화 구조 고신뢰성 제어기기를 위한 보팅 시스템버스 프로토콜 (Voting System Bus Protocol for a Highly-Reliable PLC with Redundant Modules)

  • 정우혁;박재현
    • 제어로봇시스템학회논문지
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    • 제20권6호
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    • pp.689-694
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    • 2014
  • An SPLC (Safety Programmable Logic Controller) must be designed to meet the highest safety standards, IEEE 1E, and should guarantee a level of fault-tolerance and high-reliability that ensures complete error-free operation. In order to satisfy these criteria, I/O modules, communication modules, processor modules and bus modules of the SPLC have been configured in triple or dual modular redundancy. The redundant modules receive the same data to determine the final data by the voting logic. Currently, the processor of each rx module performs the voting by deciding on the final data. It is the intent of this paper to prove the improvement on the current system, and develop a voting system for multiple data on a system bus level. The new system bus protocol is implemented based on a TCN-MVB that is a deterministic network consisting of a master-slave structure. The test result shows that the suggested system is better than the present system in view of its high utilization and improved performance of data exchange and voting.

시스템 신뢰도 평가를 위한 동적 결함 트리(Dynamic Fault Tree) 알고리듬 연구 (A Study on Reliability Evaluation Using Dynamic Fault Tree Algorithm)

  • 김진수;양성현;이기서
    • 한국통신학회논문지
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    • 제24권10A호
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    • pp.1546-1554
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    • 1999
  • 본 논문에서는 결함 및 마스크, 스위칭 기능을 포함한 결함에 대한 동적 구조를 갖는 결함 허용 시스템에 대하여 신뢰도 평가를 할 수 있는 동적 결함 트리 알고리듬(Dynamic Fault Tree Algorithm)을 제안한다. 본 알고리듬에서는 동적 특성을 표현할 수 있는 FDEP, CSP, SEQ, PAG 게이트 정의로부터 출발한다. 이러한 게이트의 정의는 시스템의 동적 특성을 만족시키기 위해 시스템의 상태증가를 유발하는 기존의 마코브 모델과 시스템의 정적 특성에 대해서만 평가 가능했던 결함 트리 모델에 대한 제약조건을 해결할 수 있었다. 본 논문에서는 제시한 알고리듬의 장점을 입증하기 위하여 동적 특성을 가지는 TMR(Triple Modular Redundancy) 시스템과 이중화 중복 시스템(Dual Duplex System)에 대해 기존의 알고리듬과 제시하는 알고리듬을 적용하여 신뢰성 평가를 수행한 후 이를 통해 제시하는 알고리듬이 동적 여분을 사용하는 시스템이나 순차 종속 고장들을 가지는 시스템, 결함과 오류의 복구 기술을 가지는 시스템들에 대해 우수함을 보여준다.

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