• Title/Summary/Keyword: Top oxide

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The oxidation of silicon nitride layer (실리콘 질화막의 산화)

  • 정양희;이영선;박영걸
    • Electrical & Electronic Materials
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    • v.7 no.3
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    • pp.231-235
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    • 1994
  • The multi-dielectric layer $SiO_2$/$Si_3{N_4}$/$SiO_2$ (ONO) is used to improve charge retention and to scale down the memory device. The nitride layer of MNOS device is oxidize to form ONO system. During the oxidation of the nitride layer, the change of thickness of nitride layer and generation of interface state between nitride layer and top oxide layer occur. In this paper, effects of oxidation of the nitride layer is studied. The decreases of the nitride layer due to oxidation and trapping characteristics of interface state of multi layer dielectric film are investigated through the C-V measurement and F-N tunneling injection experiment using SONOS capacitor structure. Based on the experimental results, carrier trapping model for maximum flatband voltage shift of multi layer dielectric film is proposed and compared with experimental data. As a results of curve fitting, interface trap density between the top oxide and layer is determined as being $5{\times}10^11$~$2{\times}10^12$[$eV^1$$cm^2$].

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Study of Plasma Process Induced Damages on Metal Oxides as Buffer Layer for Inverted Top Emission Organic Light Emitting Diodes

  • Kim, Joo-Hyung;Lee, You-Jong;Jang, Jin-Nyoung;Song, Byoung-Chul;Hong, Mun-Pyo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.543-544
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    • 2008
  • In the fabrication of inverted top emission organic light emitting diodes (ITOLEDs), the organic layers are damaged by high-energy plasma sputtering process for transparent top anode. In this study, the plasma process induced damages on metal oxide hole injection layers (HILs) including $WO_3$, $MoO_3$, and $V_2O_5$ as buffer layer are examined. With the result of IV characteristic of hole-only devices, we propose that $MoO_3$ and $V_2O_5$ are stable materials against plasma sputtering process.

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Hot Corrosion and Thermally Grown Oxide Formation on the Coating of Used IN738LC Gas Turbine Blade (사용된 IN738LC 가스 터빈 블레이드 코팅층의 고온 부식 및 Thermally Grown Oxide 형성 거동)

  • Choe, Byung Hak;Han, Sung Hee;Kim, Dae Hyun;Ahn, Jong Kee;Lee, Jae Hyun;Choi, Kwang Su
    • Korean Journal of Materials Research
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    • v.32 no.4
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    • pp.200-209
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    • 2022
  • In this study, defects generated in the YSZ coating layer of the IN738LC turbine blade are investigated using an optical microscope and SEM/EDS. The blade YSZ coating layer is composed of a Y-Zr component top coat layer and a Co component bond coat layer. A large amount of Cr/Ni component that diffused from the base is also measured in the bond coat. The blade hot corrosion is concentrated on the surface of the concave part, accompanied by separation of the coating layer due to the concentration of combustion gas collisions here. In the top coating layer of the blade, cracks occur in the vertical and horizontal directions, along with pits in the top coating layer. Combustion gas components such as Na and S are contained inside the pits and cracks, so it is considered that the pits/cracks are caused by the corrosion of the combustion gases. Also, a thermally grown oxide (TGO) layer of several ㎛ thick composed of Al oxide is observed between the top coat and the bond coat, and a similar inner TGO with a thickness of several ㎛ is also observed between the bond coat and the matrix. A PFZ (precipitate free zone) deficient in γ' (Ni3Al) forms as a band around the TGO, in which the Al component is integrated. Although TGO can resist high temperature corrosion of the top coat, it should also be considered that if its shape is irregular and contains pore defects, it may degrade the blade high temperature creep properties. Compositional and microstructural analysis results for high-temperature corrosion and TGO defects in the blade coating layer used at high temperatures are expected to be applied to sound YSZ coating and blade design technology.

Characteristic Study for Defect of Top Si and Buried Oxide Layer on the Bonded SOI Wafer (Bonded SOI wafer의 top Si과 buried oxide layer의 결함에 대한 연구)

  • Kim Suk-Goo;Paik Un-gyu;Park Jea-Gun
    • Korean Journal of Materials Research
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    • v.14 no.6
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    • pp.413-419
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    • 2004
  • Recently, Silicon On Insulator (SOI) devices emerged to achieve better device characteristics such as higher operation speed, lower power consumption and latch-up immunity. Nevertheless, there are many detrimental defects in SOI wafers such as hydrofluoric-acid (HF)-defects, pinhole, islands, threading dislocations (TD), pyramid stacking faults (PSF), and surface roughness originating from quality of buried oxide film layer. Although the number of defects in SOI wafers has been greatly reduced over the past decade, the turn over of high-speed microprocessors using SOI wafers has been delayed because of unknown defects in SOI wafers. A new characterization method is proposed to investigate the crystalline quality, the buried oxide integrity and some electrical parameters of bonded SOI wafers. In this study, major surface defects in bonded SOI are reviewed using HF dipping, Secco etching, Cu-decoration followed by focused ion beam (FIB) and transmission electron microscope (TEM).

Analysis of Conduction-Path Dependent Off-Current for Asymmetric Double Gate MOSFET (비대칭 이중게이트 MOSFET의 차단전류에 대한 전도중심 의존성 분석)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.3
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    • pp.575-580
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    • 2015
  • Asymmetric double gate(DG) MOSFET is a novel transistor to be able to reduce the short channel effects. This paper has analyzed a off current for conduction path of asymmetric DGMOSFET. The conduction path is a average distance from top gate the movement of carrier in channel happens, and a factor to change for oxide thickness of asymmetric DGMOSFET to be able to fabricate differently top and bottom gate oxide thickness, and influenced on off current for top gate voltage. As the conduction path is obtained and off current is calculated for top gate voltage, it is analyzed how conduction path influences on off current with parameters of oxide thickness and channel length. The analytical potential distribution of series form is derived from Poisson's equation to obtain off current. As a result, off current is greatly changed for conduction path, and we know threshold voltage and subthreshold swing are changed for this reasons.

Analysis of Subthreshold Swing Mechanism by Device Parameter of Asymmetric Double Gate MOSFET (소자 파라미터에 따른 비대칭 DGMOSFET의 문턱전압이하 스윙 분석)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.1
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    • pp.156-162
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    • 2015
  • This paper has analyzed how conduction path and electron concentration for the device parameters such as oxide thickness, channel doping, and top and bottom gate voltage influence on subthreshold swing of asymmetric double gate MOSFET. Compared with symmetric and asymmetric double gate MOSFET, asymmetric double gate MOSFET has the advantage that the factors to be able to control the short channel effects increase since top and bottom gate oxide thickness and voltages can be set differently. Therefore the conduction path and electron concentration for top and bottom gate oxide thickness and voltages are investigated, and it is found the optimum conditions that the degradation of subthreshold swing, severe short channel effects, can reduce. To obtain the analytical subthreshold swing, the analytical potential distribution is derived from Possion's equation. As a result, conduction path and electron concentration are greatly changed for device parameters, and subthreshold swing is influenced by conduction path and electron concentration of top and bottom.

Electrical and optical properties of doped indium tin oxide thin films for top emission organic light emission devices (Top emission 유기발광적소자 적용을 위한 도핑된 indium tin oxide 박막의 전기적 광학적 특성 연구)

  • Jung, C.H.;Kang, Y.K.;Yoon, D.H.
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.18 no.4
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    • pp.160-164
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    • 2008
  • Insulating and conducting 12CaO ${\cdot}7Al_2O_3$ (Cl2A7)-doped indium tin oxide (ITO) (ITO:Cl2A7 insulator and electride) thin films were deposited on glass substrates by an RF magnetron co-sputtering method with increasing number of insulating and conducting Cl2A7 target chips. The structural, electrical and optical properties of these films were investigated. The carrier concentration decreased and resistivity increased in the films with increasing number of Cl2A7 target chips. The optical transmittance of all of the thin films was above 80 % in the visible wavelength range. The structural property and surface roughness of the films were examined and the decrease of crystallinity and surface roughness was strongly dependent on the change of grain size.

Conduction Path Dependent Threshold Voltage for the Ratio of Top and Bottom Oxide Thickness of Asymmetric Double Gate MOSFET (비대칭 이중게이트 MOSFET의 상하단 산화막 두께비에 따른 전도중심에 대한 문턱전압 의존성)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.11
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    • pp.2709-2714
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    • 2014
  • This paper has analyzed the change of threshold voltage and conduction path for the ratio of top and bottom gate oxide thickness of asymmetric double gate MOSFET. The asymmetric double gate MOSFET has the advantage that the factor to be able to control the current in the subthreshold region increases. The analytical potential distribution is derived from Poisson's equation to analyze the threshold voltage and conduction path for the ratio of top and bottom gate oxide thickness. The Gaussian distribution function is used as charge distribution. This analytical potential distribution is used to derive off-current and subthreshold swing. By observing the results of threshold voltage and conduction path with parameters of bottom gate voltage, channel length and thickness, projected range and standard projected deviation, the threshold voltage greatly changed for the ratio of top and bottom gate oxide thickness. The threshold voltage changed for the ratio of channel length and thickness, not the absolute values of those, and it increased when conduction path moved toward top gate. The threshold voltage and conduction path changed more greatly for projected range than standard projected deviation.

Investigation on Mechanical Property and Adhesion of Oxide Films Formed on Ni and Ni-Co Alloy in Room and High Temperature Environments

  • Oka, Yoshinori I.;Watanabe, Hisanobu
    • Corrosion Science and Technology
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    • v.7 no.3
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    • pp.145-151
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    • 2008
  • Material degradation such as high temperature oxidation of metallic material is a severe problem in energy generation systems or manufacturing industries. The metallic materials are oxidized to form oxide films in high temperature environments. The oxide films act as diffusion barriers of oxygen and metal ions and thereafter decrease oxidation rates of metals. The metal oxidation is, however, accelerated by mechanical fracture and spalling of the oxide films caused by thermal stresses by repetition of temperature change, vibration and by the impact of solid particles. It is therefore very important to investigate mechanical properties and adhesion of oxide films in high temperature environments, as well as the properties in a room temperature environment. The oxidation tests were conducted for Ni and Ni-Co alloy under high temperature corrosive environments. The hardness distributions against the indentation depth from the top surface were examined at room temperature. Dynamic indentation tests were performed on Ni oxide films formed on Ni surfaces at room and high temperature to observe fractures or cracks generated around impact craters. As a result, it was found that the mechanical property as hardness of the oxide films were different between Ni and Ni-Co alloy, and between room and high temperatures, and that the adhesion of Ni oxide films was relatively stronger than that of Co oxide films.

투명 유연 AMOLED TV 구현을 위한 증착형 SnO2/Ag-Pd-Cu(APC)/SnO2 다층 투명 캐소드 박막 연구

  • Kim, Du-Hui;Kim, Han-Gi
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.181.2-181.2
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    • 2016
  • OLED 소자는 발광 방향에 따라 Bottom Emission 방식과 Top Emission 방식으로 나뉜다. 이 중 대면적 OLED TV 적용에 개구율이 더 높은 Top Emission방식을 선호하는 추세이다. 높은 개구율을 가진 Top Emission OLED소자를 위해서는 투명하고 전도성이 높은 캐소드가 중요하다. 본 연구에서는 Themal Evaporation 시스템을 이용하여 증착한 $SnO_2/Ag-Pd-Cu(APC)/SnO_2$ hybrid 전극의 특성을 연구하고 Oxide/Metal/Oxide(OMO) hybrid 박막의 bending mechanism을 제시하였다. base pressure는 $1{\times}10^{-6}Torr$로 고정하고 $SnO_2$ 박막은 0.34A / 0.32V, APC 박막은 0.46A / 0.40V의 power로 성막하였다. APC와 $SnO_2$의 두께를 변수로 OMO 전극을 제작하였고 그 전기적, 광학적 특성을 Hall measurement, UV/Visible spectroscopy을 이용하여 분석하고 Figure of merit 값을 바탕으로 최적 두께를 설정하였다. UPS(Ultraviolet Photoelectron Spectroscopy) 분석으로 $SnO_2/APC/SnO_2$ 전극의 일함수을 통해 투명 cathode로 쓰였을 때 $SnO_2$ 층이 buffer layer역할을 함을 확인하였다. XPS(X-ray photoelectron spectroscopy)를 이용하여 정성분석과 정량분석을 하였고 OMO hybrid 전극의 bending mechanism 연구를 위해 다양한 bending test (Inner/Outer dynamic fatigue test, twisting test, rolling test)를 진행하였다. 물리적 힘이 가해진 OMO hybrid 전극의 표면과 구조는 FE-SEM(Field Emission Scanning Electron Microscope) 분석을 통해서 확인할 수 있었다.

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