• Title/Summary/Keyword: Timing phase

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A Design and Implementation of a Timing Analysis Simulator for a Design Space Exploration on a Hybrid Embedded System (Hybrid 내장형 시스템의 설계공간탐색을 위한 시간분석 시뮬레이터의 설계 및 구현)

  • Ahn, Seong-Yong;Shim, Jea-Hong;Lee, Jeong-A
    • The KIPS Transactions:PartA
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    • v.9A no.4
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    • pp.459-466
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    • 2002
  • Modern embedded system employs a hybrid architecture which contains a general micro processor and reconfigurable devices such as FPGAS to retain flexibility and to meet timing constraints. It is a hard and important problem for embedded system designers to explore and find a right system configuration, which is known as design space exploration (DSE). With DES, it is possible to predict a final system configuration during the design phase before physical implementation. In this paper, we implement a timing analysis simulator for a DSE on a hybrid embedded system. The simulator, integrating exiting timing analysis tools for hardware and software, is designed by extending Y-chart approach, which allows quantitative performance analysis by varying design parameters. This timing analysis simulator is expected to reduce design time and costs and be used as a core module of a DSE for a hybrid embedded system.

Direct Time-domain Phase Correction of Dual-comb Interferograms for Comb-resolved Spectroscopy

  • Lee, Joohyung
    • Current Optics and Photonics
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    • v.5 no.3
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    • pp.289-297
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    • 2021
  • We describe a comb-mode resolving spectroscopic technique by direct time-domain phase correction of unstable interferograms obtained from loosely locked two femtosecond lasers. A low-cost continuous wave laser and conventional repetition rate stabilization method were exploited for locking carrier and envelope phase of interferograms, respectively. We intentionally set the servo control at low bandwidth, resulting in severe interferograms' fluctuation to demonstrate the capability of the proposed correction method. The envelope phase of each interferogram was estimated by a quadratic fit of carrier peaks to correct timing fluctuation of interferograms in the time domain. After envelope phase correction on individual interferograms, we successfully demonstrated 1 Hz linewidth of RF comb-mode over 200 GHz optical spectral-bandwidth with 10-times signal-to-noise ratio (SNR) enhancement compared to the spectrum without correction. Besides, the group delay difference between two femtosecond pulses is successfully estimated through a linear slope of phase information.

Trajectory Optimization for Autonomous Berthing of a Twin-Propeller Twin-Rudder Ship

  • Changyu Lee;Jinwhan Kim
    • Journal of Ocean Engineering and Technology
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    • v.37 no.3
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    • pp.122-128
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    • 2023
  • Autonomous berthing is a crucial technology for autonomous ships, requiring optimal trajectory planning to prevent collisions and minimize time and control efforts. This paper presents a two-phase, two-point boundary value problem (TPBVP) strategy for creating an optimal berthing trajectory for a twin-propeller, twin-rudder ship with autonomous berthing capabilities. The process is divided into two phases: the approach and the terminal. Tunnel thruster use is limited during the approach but fully employed during the terminal phase. This strategy permits concurrent optimization of the total trajectory duration, individual phase trajectories, and phase transition time. The efficacy of the proposed method is validated through two simulations. The first explores a scenario with phase transition, and the second generates a trajectory relying solely on the approach phase. The results affirm our algorithm's effectiveness in deciding transition necessity, identifying optimal transition timing, and optimizing the trajectory accordingly. The proposed two-phase TPBVP approach holds significant implications for advancements in autonomous ship navigation, enhancing safety and efficiency in berthing operations.

A CMOS Frequency Synthesizer for 5~6 GHz UNII-Band Sub-Harmonic Direct-Conversion Receiver

  • Jeong, Chan-Young;Yoo, Chang-Sik
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.9 no.3
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    • pp.153-159
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    • 2009
  • A CMOS frequency synthesizer for $5{\sim}6$ GHz UNII-band sub-harmonic direct-conversion receiver has been developed. For quadrature down-conversion with sub-harmonic mixing, octa-phase local oscillator (LO) signals are generated by an integer-N type phase-locked loop (PLL) frequency synthesizer. The complex timing issue of feedback divider of the PLL with large division ratio is solved by using multimodulus prescaler. Phase noise of the local oscillator signal is improved by employing the ring-type LC-tank oscillator and switching its tail current source. Implemented in a $0.18{\mu}m$ CMOS technology, the phase noise of the LO signal is lower than -80 dBc/Hz and -113 dBc/Hz at 100 kHz and 1MHz offset, respect-tively. The measured reference spur is lower than -70 dBc and the power consumption is 40 m W from a 1.8 V supply voltage.

Accuracy Comparison of Existing 3 Models in Estimating Time-Varying Variance of Phase Deviation of a Simple Planar Oscillator (간단한 평면 오실레이터의 위상 천이의 시변 분산에 대한 기존 3개 모델의 추정 정확도 비교)

  • Jeon, Man-Young
    • Journal of IKEEE
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    • v.19 no.4
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    • pp.500-505
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    • 2015
  • Through Montecarlo simulation, this study compares how accurately the existing three phase deviation models estimate the time-varying variance of a planar oscillator perturbed by Gaussian noises. The comparison reveals that Kaertner model estimates the time-varying variance with about 1000 times higher accuracy than ISF or PP model exhibits. Additionally, it finds that the estimation accuracy of PP model is somewhat higher than that of ISF model.

Spectrally Phase Coded Waveform Discrimination at 10 GHz for Narrow Band Optical CDMA within 100 GHz Spectral Window

  • Seo, Dong-Sun;Supradeepa, V.R.
    • Journal of the Optical Society of Korea
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    • v.14 no.1
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    • pp.28-32
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    • 2010
  • We demonstrate binary spectral phase coded waveform discrimination at 10 GHz for narrow band optical code-division multiple-access (NB-OCDMA) via direct electrical detection without using any optical hard-limiter. Only 9 phase-locked, 10 GHz spaced, spectral lines within a 100 GHz spectral window are used for the phase coding. Considerably high contrast ratio of 5 between signal and multiuser access interference noise can be achieved for $4{\times}10\;G\;pulse/sec$ timing coordinated OCDMA at a simple electrical receiver with 50 GHz bandwidth.

EFFECT OF VALVE TIMING AND LIFT ON FLOW AND MIXING CHARACTERISTICS OF A CAI ENGINE

  • Kim, J.N.;Kim, H.Y.;Yoon, S.S.;Sa, S.D.;Kim, W.T.
    • International Journal of Automotive Technology
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    • v.8 no.6
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    • pp.687-696
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    • 2007
  • To increase the reliability of auto-ignition in CAI engines, the thermodynamic properties of intake flow is often controlled using recycled exhaust gases, called internal EGR. Because of the internal EGR influence on the overall thermodynamic properties and mixing quality of the gases that affect the subsequent combustion behavior, optimizing the intake and exhaust valve timing for the EGR is important to achieve the reliable auto-ignition and high thermal efficiency. In the present study, fully 3D numerical simulations were carried out to predict the mixing characteristics and flow field inside the cylinder as a function of valve timing. The 3D unsteady Eulerian-Lagrangian two-phase model was used to account for the interaction between the intake air and remaining internal EGR during the under-lap operation while varying three major parameters: the intake valve(IV) and exhaust valve(EV) timings and intake valve lift(IVL). Computational results showed that the largest EVC retardation, as in A6, yielded the optimal mixing of both EGR and fuel. The IV timing had little effect on the mixing quality. However, the IV timing variation caused backflow from the cylinder to the intake port. With respect to reduction of heat loss due to backflow, the case in B6 was considered to present the optimal operating condition. With the variation of the intake valve lift, the A1 case yielded the minimum amount of backflow. The best mixing was delivered when the lift height was at a minimum of 2 mm.

Position Estimation Technique of High Speed Vehicle Using TLM Timing Synchronization Signal (TLM 시각 동기 신호를 이용한 고속 이동체의 위치 추정)

  • Jin, Mi-Hyun;Koo, Ddeo-Ol-Ra;Kim, Bok-Ki
    • Journal of Advanced Navigation Technology
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    • v.26 no.5
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    • pp.319-324
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    • 2022
  • If radio interference occurs or there is no navigation device, radio navigation of high-speed moving object becomes impossible. Nevertheless, if there are multiple ground stations and precise range measurement between the high-speed moving object and the ground station can be secured, it is possible to estimate the position of moving object. This paper proposes a position estimation method using high-precision TDOA measurement generated using TLM signal. In the proposed method, a common error of moving object is removed using the TDOA measurements. The measurements is generated based on TLM signal including SOQPSK PN symbol capable of precise timing synchronization. Therefore, since precise timing synchronization of the system has been performed, the timing error between ground stations has a very small value. This improved the position estimation performance by increasing the accuracy of the measured values. The proposed method is verified through software-based simulation, and the performance of estimated position satisfies the target performance.

Core Circuit Technologies for PN-Diode-Cell PRAM

  • Kang, Hee-Bok;Hong, Suk-Kyoung;Hong, Sung-Joo;Sung, Man-Young;Choi, Bok-Gil;Chung, Jin-Yong
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.8 no.2
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    • pp.128-133
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    • 2008
  • Phase-change random access memory (PRAM) chip cell phase of amorphous state is rapidly changed to crystal state above 160 Celsius degree within several seconds during Infrared (IR) reflow. Thus, on-board programming method is considered for PRAM chip programming. We demonstrated the functional 512Mb PRAM with 90nm technology using several novel core circuits, such as metal-2 line based global row decoding scheme, PN-diode cells based BL discharge (BLDIS) scheme, and PMOS switch based column decoding scheme. The reverse-state standby current of each PRAM cell is near 10 pA range. The total leak current of 512Mb PRAM chip in standby mode on discharging state can be more than 5 mA. Thus in the proposed BLDIS control, all bitlines (BLs) are in floating state in standby mode, then in active mode, the activated BLs are discharged to low level in the early timing of the active period by the short pulse BLDIS control timing operation. In the conventional sense amplifier, the simultaneous switching activation timing operation invokes the large coupling noise between the VSAREF node and the inner amplification nodes of the sense amplifiers. The coupling noise at VSAREF degrades the sensing voltage margin of the conventional sense amplifier. The merit of the proposed sense amplifier is almost removing the coupling noise at VSAREF from sharing with other sense amplifiers.

A Study on a Cell search Using PCSSCG in Broadband OFCDM Systems (OFCDM시스템에서 PCSSCG를 이용한 셀 탐색에 관한 연구)

  • Kim Dae-Yong;Choi Kwon-Hue;Park Yong-Wan
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.6 s.348
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    • pp.1-8
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    • 2006
  • In the asynchrous OFCDM(Orthogonal Frequency and Code Division Multiplexing) system, a three-step cell search algorithm is performed for the initial synchronization in the following three steps: OFCDM symbol timing, i.e., Fast Fourier Transform(FFT) window timing is estimated employing guard interval (GI) correlation in the first step, then the frame timing and CSSC (Cell Specific Scrambling Code) group is detected by taking the correlation of the CPICH(Common Pilot Channel) based on the property yeilded by shifting the CSSC phase in the frequency domain. Finally, the CSSC phase within the group is identified in the third step. This paper proposes a modification code(PCSSCG:Patial Cell Specific Scrambling Code Group) of the conventional CPICH based cell search algorithm in the second step which offers MS(Mobile Station) complexity reductions with the nearly same performance. The proposed method is to be compared and verified through the computer simulation.