• Title/Summary/Keyword: Timing offset

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Complexity Reduced CP Length Pre-decision Algorithm for SSS Detection at Initial Cell Searcher of 3GPP LTE Downlink System (3GPP LTE 하향링크 시스템의 초기 셀 탐색기 SSS 검출 시 복잡도 최소화를 위한 CP 길이 선 결정 알고리즘)

  • Kim, Young-Bum;Kim, Jong-Hun;Chang, Kyung-Hi
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.9A
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    • pp.656-663
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    • 2009
  • In 3GPP LTE system downlink, PSS (primary synchronization signal) and SSS (secondary synchronization signal) sequences are used for initial cell search and synchronization. UE (user equipment) detects slot timing, frequency offset, and cell ID by using PSS. After that it should detect frame timing, cell group ID, and CP length by using SSS. But in 3GPP LTE, there are two kinds of CP length, so we should operate FFT twice. In this paper, to minimize SSS detection complexity in cell searcher, we propose a CP length pre-decision algorithm that reduces the arithmetical complexity by half at most, with negligible performance degradation.

Cell Searching and DoA Estimation Techniques for Mobile Relay Stations with a Uniform Linear Array (선형 등간격 어레이를 갖는 이동 릴레이를 위한 셀 탐색 및 입사각 추정 기법)

  • Ko, Yo-Han;Park, Chang-Hwan;Lee, Seung-Jae;Cho, Yong-Soo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.6C
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    • pp.530-538
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    • 2010
  • In this paper, estimation methods of cell searching and DoA (Direction of Arrival) for mobile relay stations with a uniform linear array are proposed. The proposed methods can improve the performance of cell searching and DoA estimation by removing the effect of STOs when there exist symbol timing offsets (STOs) between the signals received from adjacent base stations,. Also, the proposed methods can improve the performance of DoA estimation significantly when there exists Doppler frequency shift caused by movement of the mobile relay station. The performances and computational complexities of the proposed cell searching and DoA methods are evaluated by computer simulation under Mobile WiMAX environments.

Review of Injection-Locked Oscillators

  • Choo, Min-Seong;Jeong, Deog-Kyoon
    • Journal of Semiconductor Engineering
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    • v.1 no.1
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    • pp.1-12
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    • 2020
  • Handling precise timing in high-speed transceivers has always been a primary design target to achieve better performance. Many different approaches have been tried, and one of those is utilizing the beneficial nature of injection locking. Though the phenomenon was not intended for building integrated circuits at first, its coupling effect between neighboring oscillators has been utilized deliberately. Consequently, the dynamics of the injection-locked oscillator (ILO) have been explored, starting from R. Adler. As many aspects of the ILO were revealed, further studies followed to utilize the technique in practice, suggesting alternatives to the conventional frequency syntheses, which tend to be complicated and expensive. In this review, the historical analysis techniques from R. Adler are studied for better comprehension with proper notation of the variables, resulting in numerical results. In addition, how the timing jitter or phase noise in the ILO is attenuated from noise sources is presented in contrast to the clock generators based on the phase-locked loop (PLL). Although the ILO is very promising with higher cost effectiveness and better noise immunity than other schemes, unless correctly controlled or tuned, the promises above might not be realized. In order to present the favorable conditions, several strategies have been explored in diverse applications like frequency multiplication, data recovery, frequency division, clock distribution, etc. This paper reviews those research results for clock multiplication and data recovery in detail with their advantages and disadvantages they are referring to. Through this review, the readers will hopefully grasp the overall insight of the ILO, as well as its practical issues, in order to incorporate it on silicon successfully.

Discontinuity in GNSS Coordinate Time Series due to Equipment Replacement

  • Sohn, Dong-Hyo;Choi, Byung-Kyu;Kim, Hyunho;Yoon, Hasu;Park, Sul Gee;Park, Sang-Hyun
    • Journal of Positioning, Navigation, and Timing
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    • v.11 no.4
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    • pp.287-295
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    • 2022
  • The GNSS coordinate time series is used as important data for geophysical analysis such as terrestrial reference frame establishment, crustal deformation, Earth orientation parameter estimation, etc. However, various factors may cause discontinuity in the coordinate time series, which may lead to errors in the interpretation. In this paper, we describe the discontinuity in the coordinate time series due to the equipment replacement for domestic GNSS stations and discuss the change in movement magnitude and velocity vector difference in each direction before and after discontinuity correction. To do this, we used three years (2017-2019) of data from 40 GNSS stations. The average magnitude of the velocity vector in the north-south, east-west, and vertical directions before correction is -12.9±1.5, 28.0±1.9, and 4.2±7.6 mm/yr, respectively. After correction, the average moving speed in each direction was -13.0±1.0, 28.2±0.8, and 0.7±2.1 mm/yr, respectively. The average magnitudes of the horizontal GNSS velocity vectors before and after discontinuous correction was similar, but the deviation in movement size of stations decreased after correction. After equipment replacement, the change in the vertical movement occurred more than the horizontal movement variation. Moreover, the change in the magnitude of movement in each direction may also cause a change in the velocity vector, which may lead to errors in geophysical analysis.

Design of Digital PLL with Asymmetry Compensator in High Speed DVD Systems (고속 DVD 시스템에서 비대칭 신호 보정기와 결합한 Digital PLL 설계)

  • 김판수;고석준;최형진;이정현
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.12A
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    • pp.2000-2011
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    • 2001
  • In this Paper, we convert conventional low speed(1x, 6x) DVD systems designed by analog PLL(Phase Locked Loop) into digital PLL to operate at high speed systems flexibly, and present optimal DPLL model in high speed(20x) DVD systems. Especially, we focused on the design of DPLL that can overcome channel effects such as bulk delay, sampling clock frequency offset and asymmetry phenomenon in high speed DVD systems. First, the modified Early-Late timing error detector as digital timing recovery scheme is proposed. And the four-sampled compensation algorithm using zero crossing point as asymmetry compensator is designed to achieve high speed operation and strong reliability. We show that the proposed timing recovery algorithm provides enhanced performances in jitter valiance and SNR margin by 4 times and 3dB respectively. Also, the new four-sampled zero crossing asymmetry compensation algorithm provides 34% improvement of jitter performance, 50% reduction of compensation time and 2.0dB gain of SNR compared with other algorithms. Finally, the proposed systems combined with asymmetry compensator and DPLL are shown to provide improved performance of about 0.4dB, 2dB over the existing schemes by BER evaluation.

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Measurement Results of Uncoded-BER with respect to OFDM Symbol Timing Offset (OFDM 심벌 타이밍 옵셋에 의한 Uncoded-BER 측정 결과)

  • Lee, Jae-Ho;Ra, Sang-Jung;Choi, Dong-Joon;Hur, Nam-Ho
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2014.06a
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    • pp.243-245
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    • 2014
  • 본 논문에서는 OFDM(Orthogonal Frequency Division Multiplexing)시스템에서 OFDM 심벌 타이밍 옵셋에 따른 4096QAM 의 uncoded-BER(Bit Error Rate) 및 성상도를 측정하였다. uncoded-BER 은 수신기의 FEC(Forward Error Correction) 복호기 이전에서 측정된 BER 을 의미한다. 측정을 위해, OFDM 을 사용하는 DVB-C2(Digital Video Broadcasting for Cable Systems 2) 송수신기를 FPGA(Field Programmable Gate Array)를 이용하여 구현하였으며, OFDM 심벌의 CP(Cyclic Prefix)를 이용하여 OFDM 심벌 동기를 수행하였다. 일반적으로, OFDM 심벌 동기는 OFDM 심벌에서 CP 가 반복된다는 특성을 이용한 상관기를 사용한다. 또한, ISI(Inter Symbol Interference) 및 ICI(Inter Channel Interference)를 최소화하기 위해, 채널의 최대 지연시간을 고려하여 CP 내에서 OFDM 심벌 동기가 획득된다. 이럴 경우 수신기에서는 각 부반송파에 할당된 QAM 심벌들의 위상 회전이 발생하지만, 등화기에서 이러한 위상 회전이 보상된다. 부반송파에 할당된 파일롯 심벌들을 이용하여 채널 추정 및 보상을 하는 등화기에서, 파일롯 심볼들도 OFDM 심벌 타이밍 옵셋에 의해 위상회전이 발생하기 때문에 채널 추정 값에 영향을 미친다. 따라서, 본 논문에서는 4096QAM 과 ZF-LE(Zero Forcing Linear Equalizer)를 사용한 경우, OFDM 심벌 타이밍 옵셋에 따른 uncoded-BER 및 성상도의 측정 결과를 제시하였다.

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A Numerical Algorithm for Evaluating Progression Efficiency along Coordinated Arterials Using Shock Wave Theory (충격파이론을 응용한 간선도로 신호연동화의 효율 평가를 위한 알고리즘의 개발)

  • Kim, Young-Chan;Baek, Hyon-Su
    • Journal of Korean Society of Transportation
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    • v.17 no.2
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    • pp.83-90
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    • 1999
  • A computer algorithm is presented that evaluate the performance of coordinated signal timing plans for the signalized arterials. The procedures calculating delay and stops are based on Michalopoulos's analytical model derived from shock wave theory. The delay-offset relationship predicted from the algorithm produced consistent results with the delays venerated by TRANSYT-7F. From performance test, the delays estimated using the proposed a1gorithm are shown to be sensitive to the quality of progression as well as to traffic demand, link length, and turning flow ratio from upstream signal.

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Performance Evaluation on the Power Consumption of IEEE802.15.4e TSCH (IEEE802.15.4e TSCH의 소비전력에 대한 성능평가)

  • Kim, Dongwon;Youn, Mi-Hee
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.18 no.1
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    • pp.37-41
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    • 2018
  • In this paper, we evaluate the power consumption of IEEE802.15.4e TSCH which uses the specific link scheduling scheme proposed in reference[1]. And we also compares it with the power consumption of conventional single channel IEEE802.15.4. The power consumption of IEEE802.15.4e TSCH is smaller than the conventional one under the any conditions of traffic. The reasons can be explained as the followings. Firstly, TSCH does not have backoff time because of using the collision free link scheduling. Secondly, there is the timing difference of MAC offset parameter between TSCH and conventional IEEE802.15.4 Lastly, the devices in TSCH mode sleep during the time slots which are not assigned to itself.

Performance Analysis of a Baseband Noncoherent Code Tracking Loop for DS-CDMA Systems (CDMA 시스템용 기저 대역 비동기식 동기 추적 회로의 성능 분석)

  • 이경준;박형래;채수환
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.8 no.6
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    • pp.645-655
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    • 1997
  • In this paper, the performance of the noncoherent code tracking loop designed at baseband for CDMA applications is analyzed in detail and is confirmed by computer simulations. Analytical closed-form formula for jitter variance is derived for AWGN channel environments as a function of pulse shaping filter, timing offset, signal-to-interference ratio, and loop filter coefficients. The design issue of the loop filter is also addressed with emphasis on the second-order tracking loop. Finally, the performance of the designed tracking loop is examined by computer simulations for both AWGN and Rayleigh fading channels, when applied to the reverse link of the coherent CDMA system for IMT-2000 designed by ETRI.

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A study on the design and implementation of uplink receiver for BWLL Base Station modem (광대역 무선가입자망 기지국용 모뎀의 상향링크 수신기 설계 및 구현에 관한 연구)

  • 남옥우;김재형
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2001.10a
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    • pp.307-310
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    • 2001
  • In this paper we describe the design and implementation of uplink receiver for BWLL base station modem. The demodulator consists of digital down converter, matched filter and synchronization circuits. For symbol timing recovery we use Gardner algorithm. And we use forth power method and decision directed method for carrier frequency recovery and phase recovery, respectively. For the sake of performance analysis, we compare simulation results with the board implemented by FPGA which is APEX20KE series chip for Alter. The performance results show it works quite well up to the condition that a frequency offset equal to 4.7% of symbol rate.1

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