• Title/Summary/Keyword: Timing die

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Timing Chart Auto-Design system development for an Automated hemming die design (헤밍금형설계의 자동화를 위한 타이밍선도 자동설계시스템개발)

  • 정효상;조윤행
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2004.10a
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    • pp.973-976
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    • 2004
  • So far, this report is written by knowledge and standard through several reference drawing and experienced contents with drawing hemming die. The contents about actual design is so huge that I will write about it next time. Timing chart is important to hemming die because of link position and numbers. Timing chart need a very much design time because link number and position have to applied for each case. In this paper developed an automatic timing chart and link position by relation and Pro/Program of Pro/Engineer. The method used relation rule of design parameter for timing chart. In the future, I believe that simple easy to correct and reasonable price hemming die will be producted.

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Automatic Generation of Timing Chart for Car Panel Hemming Die Design (자동차 패널용 헤밍 금형설계를 위한 타이밍차트 자동생성)

  • Kim, D.J.;Song, Y.J.;Chung, H.;Han, Y.H.
    • Transactions of Materials Processing
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    • v.15 no.7 s.88
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    • pp.496-503
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    • 2006
  • The inner and outer car panels for bonnet, door, and trunk lid are assembled by hemming rather than welding. To achieve successful fabrication of these panels, the complicated timing chart of hemming units for pre-and main hemming stages should be made to optimal one. In this study, a design system for automatic timing chart generation is developed. Using AutoCAD VBA and EXCEL data chart, hemming die design parameters and guidelines were put into the program to give hemming unit drawings and consequent timing charts. Then the prepared timing charts were checked and modified. The effectiveness of the system is verified by applying it successfully to hemming unit design for bonnet panel joining.

A study on the design of a strip Lay-out for trimming tool of the automobile bonnet (자동차 본네트 트림 금형 스트립 레이아웃 설계에 관한 연구)

  • 정효상;이성수
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 2002.04a
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    • pp.675-681
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    • 2002
  • Parametric modeling and configuration design method are a important methods for rapid design in manufacturing. This paper proposes a relation rules which parametrically models a bonnet trimming tool based on Pro/Engineer. The concept of desogn is applied a trimming die of the bonnet outer panel. Trimming die have a many parameters. Each a parameter is related the die face and punch profile. A design system consists of a Pro/Engineer, a Pro/program.

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IEEE 1500 Wrapper Design Technique for Pre/Post Bond Testing of TSV based 3D IC (TSV 기반 3D IC Pre/Post Bond 테스트를 위한 IEEE 1500 래퍼 설계기술)

  • Oh, Jungsub;Jung, Jihun;Park, Sungju
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.1
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    • pp.131-136
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    • 2013
  • TSV based 3D ICs have been widely developed with new problems at die and IC levels. It is imperative to test at post-bond as well as pre-bond to achieve high reliability and yield. This paper introduces a new testable design technique which not only test microscopic defects at TSV input/output contact at a die but also test interconnect defects at a stacked IC. IEEE 1500 wrapper cells are augmented and through at-speed tests for pre-bond die and post-bond IC, known-good-die and defect free 3D IC can be massively manufactured+.

Design of Timing Register Structure for Area Optimization of High Resolution and Low Power SAR ADC (고해상도 저전력 SAR ADC의 면적 최적화를 위한 타이밍 레지스터 구조 설계)

  • Min, Kyung-Jik;Kim, Ju-Sung;Cho, Hoo-Hyun;Pu, Young-Gun;Hur, Jung;Lee, Kang-Yoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.8
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    • pp.47-55
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    • 2010
  • In this paper, a timing register architecture using demultiplexer and counter is proposed to reduce the area of the high resolution SAR type analog to digital converter. The area and digital power consumption of the conventional timing register based on the shift register is drastically increased, as the resolution is increased. On the other hand, the proposed architecture results in reduction of the area and the power consumption of the error correction logic of the SAR ADC. This chip is implemented with 0.18 um CMOS process. The area is reduced by 5.4 times and the digital power consumption is minimized compared with the conventional one. The 12 bits SAR ADC shows ENOB of 11 bits, power consumption of 2 mW, and conversion speed of 1 MSPS. The die area is $1 mm{\times}1mm$.

Experimental investigation of Scalability of DDR DRAM packages

  • Crisp, R.
    • Journal of the Microelectronics and Packaging Society
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    • v.17 no.4
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    • pp.73-76
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    • 2010
  • A two-facet approach was used to investigate the parametric performance of functional high-speed DDR3 (Double Data Rate) DRAM (Dynamic Random Access Memory) die placed in different types of BGA (Ball Grid Array) packages: wire-bonded BGA (FBGA, Fine Ball Grid Array), flip-chip (FCBGA) and lead-bonded $microBGA^{(R)}$. In the first section, packaged live DDR3 die were tested using automatic test equipment using high-resolution shmoo plots. It was found that the best timing and voltage margin was obtained using the lead-bonded microBGA, followed by the wire-bonded FBGA with the FCBGA exhibiting the worst performance of the three types tested. In particular the flip-chip packaged devices exhibited reduced operating voltage margin. In the second part of this work a test system was designed and constructed to mimic the electrical environment of the data bus in a PC's CPU-Memory subsystem that used a single DIMM (Dual In Line Memory Module) socket in point-to-point and point-to-two-point configurations. The emulation system was used to examine signal integrity for system-level operation at speeds in excess of 6 Gb/pin/sec in order to assess the frequency extensibility of the signal-carrying path of the microBGA considered for future high-speed DRAM packaging. The analyzed signal path was driven from either end of the data bus by a GaAs laser driver capable of operation beyond 10 GHz. Eye diagrams were measured using a high speed sampling oscilloscope with a pulse generator providing a pseudo-random bit sequence stimulus for the laser drivers. The memory controller was emulated using a circuit implemented on a BGA interposer employing the laser driver while the active DRAM was modeled using the same type of laser driver mounted to the DIMM module. A custom silicon loading die was designed and fabricated and placed into the microBGA packages that were attached to an instrumented DIMM module. It was found that 6.6 Gb/sec/pin operation appears feasible in both point to point and point to two point configurations when the input capacitance is limited to 2pF.

A Study on Cluster Head Selection and a Cluster Formation Plan to Prolong the Lifetime of a Wireless Sensor Network

  • Ko, Sung-Won;Cho, Jeong-Hwan
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.29 no.7
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    • pp.62-70
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    • 2015
  • The energy of a sensor in a Wireless Sensor Network (WSN) puts a limit on the lifetime of the network. To prolong the lifetime, a clustering plan is used. Clustering technology gets its energy efficiency through reducing the number of communication occurrences between the sensors and the base station (BS). In the distributed clustering protocol, LEACH-like (Low Energy Adaptive Clustering Hierarchy - like), the number of sensor's cluster head (CH) roles is different depending on the sensor's residual energy, which prolongs the time at which half of nodes die (HNA) and network lifetime. The position of the CH in each cluster tends to be at the center of the side close to BS, which forces cluster members to consume more energy to send data to the CH. In this paper, a protocol, pseudo-LEACH, is proposed, in which a cluster with a CH placed at the center of the cluster is formed. The scheme used allows the network to consume less energy. As a result, the timing of the HNA is extended and the stable network period increases at about 10% as shown by the simulation using MATLAB.

A 0.12GHz-1.4GHz DLL-based Clock Generator with a Multiplied 4-phase Clock Using a 0.18um CMOS Process

  • Chi, Hyung-Joon;Lee, Jae-Seung;Sim, Jae-Yoon;Park, Hong-June
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.6 no.4
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    • pp.264-269
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    • 2006
  • A $0.12GHz{\sim}1.4GHz$ DLL-based clock generator with the capability of multiplied four phase clock generation was designed using a 0.18um CMOS process. An adaptive bandwidth DLL with a regulated supply delay line was used for a multiphase clock generation and a low jitter. An extra phase detector (PD) in a reference DLL solves the problem of the initial VCDL delay and achieves a fast lock time. Twice multiplied four phase clocks were generated at the outputs of four edge combiners, where the timing alignment was achieved using a coarse lock signal and the 10 multiphase clocks with T/8 time difference. Those four clocks were combined one more time using a static XOR circuit. Therefore the four times multiplication was achieved. With a 1.8V supply, the rms jitter of 2.1ps and the peak-to-peak jitter of 14.4ps were measured at 1.25GHz output. The operating range is $0.12GHz{\sim}1.4GHz$. It consumes 57mW and occupies 450*325um2 of die area.

Initial Experience of the Emergency Bypass System ($EBS^{(R)}$) for the Patients with Cardiogenic Shock due to an Acute Myocardial Infarction (급성 심근경색으로 인한 심인성 쇼크 환자에 대한 경피적 순환 보조장치($EBS^{(R)}$) 적용의 초기경험)

  • Ryu, Kyoung-Min;Kim, Sam-Hyun;Seo, Pil-Won;Ryu, Jae-Wook;Kim, Seok-Kon;Kim, Young-Hwa;Park, Seong-Sik
    • Journal of Chest Surgery
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    • v.41 no.3
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    • pp.329-334
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    • 2008
  • Background: Percutaneous cardiopulmonary support. (PCPS) has the potential to rescue patients in cardiogenic shock who might otherwise die. PCPS has been a therapeutic option in a variety of the clinical settings such as for patients with myocardial Infarction, high-risk coronary intervention and postcardiotomy cardiogenic shock, and the PCPS device is easy to install. We report our early experience with PCPS as a life saving procedure in cardiogenic shock patients due to acute myocardial infarction. Material and Method: From January 2005 to December 2006, eight patients in cardiogenic shock with acute myocardial infarction underwent PCPS using the CAPIOX emergency bypass system($EBS^{(R)}$, Terumo, Tokyo, Japan). Uptake cannulae were inserted deep into the femoral vein up to the right atrium and return cannulae were inserted into the femoral artery with Seldinger techniques using 20 and 16-French cannulae, respectively. Simultaneously, autopriming was performed at the $EBS^{(R)}$ circuit. The $EBS^{(R)}$ flow rate was maintained between $2.5{\sim}3.0L/min/m^2$ and anticoagulation was performed using intravenous heparin with an ACT level above 200 seconds. Result: The mean age of patients was $61.1{\pm}14.2$ years (range, 39 to 77 years). Three patients were under control of the $EBS^{(R)}$ before percutaneous coronary intervention (PCI), three patients were under control of the $EBS^{(R)}$ during PCI, one patient was under control of the $EBS^{(R)}$ after PCI, and one patient was under control of the $EBS^{(R)}$ after coronary bypass surgery. The mean support time was $47.5{\pm}27.9$ hours (range, 8 to 76 hours). Five patients (62.5%) could be weaned from the $EBS^{(R)}$ after $53.6{\pm}27.2$ hours. (range, 12 to 68 hours) of support. All of the patients who could successfully be weaned from support were discharged from the hospital. There were three complications: one case of gastrointestinal bleeding and two cases of acute renal failure. Two of the three mortality cases were under cardiac arrest before $EBS^{(R)}$ support, and one patient had an intractable ventricular arrhythmia during the support. All of the discharged patients are still surviving at $16.8{\pm}3.1$ months (range, 12 to 20 months) of follow-up. Conclusion: The use of $EBS^{(R)}$ for cardiogenic shock caused by an acute myocardial infarction could rescue patients who might otherwise have died. Successfully recovered patients after $EBS^{(R)}$ treatment have survived without severe complications. More experience and additional clinical investigations are necessary to elucidate the proper installation timing and management protocol of the $EBS^{(R)}$ in the future.