• 제목/요약/키워드: Timing Controller

검색결과 129건 처리시간 0.025초

직접분사식 압축착화 디젤엔진의 분사시기 변화에 따른 연소 및 성능특성에 관한 연구 (A Study on the Combustion and Performance Characteristics in Compression Ignition CRDI Diesel Engine)

  • 김기복;김치원;윤창식
    • 한국산업융합학회 논문집
    • /
    • 제19권1호
    • /
    • pp.31-38
    • /
    • 2016
  • Since the oil shock of 1970's there was a strong upward tendency for the use of the high viscosity and poorer quality fuels. Therefore the misfiring engine occurs due to the decrease of quantity injected for lean burn and emission control in Compression Ignition Common Rail Direct Injection diesel engine. In this study, it is designed and used the test bed which is installed with fuel injector controller. In addition to equipped engine using CRDI by controlling the injection timing with mapping modulator, it has tested and analyzed the engine performance and combustion characteristics, as it is varied that they are the operating parameters: fuel injected quantity, engine speed and injection timing.

다중샘플링 다중작업을 수행하는 실시간제어시스템의 시계수제한성 유도 (Derivation of the Timing Constraints for Multi-Sampled Multitasks in a Real-Time Control System)

  • 이대현;김학배
    • 제어로봇시스템학회논문지
    • /
    • 제5권2호
    • /
    • pp.145-150
    • /
    • 1999
  • A real-time control system, composed of the controlled processor and the controller computer(s), may have a variety of task types, some of which have tight timing-constraints in generating the correct control input. The maximum period of those task failures tolerable by the system is called the hard deadline, which depends on not only fault characteristics but also task characteristics. In the paper, we extend a method deriving the hard deadline in LTI system executing single task. An algorithm to combine the deadlines of all the elementary tasks in the same operation-mode is proposed to derive the hard deadline of the entire system. For the end, we modify the state equation for the task to capture the effects of task failures (delays in producing correct values) and inter-correlation. We also classify the type of executing the tasks according to operation modes associated with relative importance of correlated levels among tasks, into series, parallel, and cascade modes. Some examples are presented to demonstrate the effectiveness of the proposed methods.

  • PDF

DSP를 이용한 비선형 타이밍 벨트 구동시스템의 QLQG/LTR 제어 (QLQG/LTR Control of the Nonlinear Timing-Belt Driving Systme Using DSP)

  • 한성익;방두열
    • 한국공작기계학회논문집
    • /
    • 제10권4호
    • /
    • pp.40-47
    • /
    • 2001
  • In this pater, the QLQG/LTR control method is applied for the position control of the nonlinear timing belt driving sys-tem. Parameters fo the plant are identified by genetic algorithm and nonlinear elements, such as Coulomb friction and dead-zone, and quasi-linearized by RIDE method. Comparing with the LQG/LTR contro. the QLQG/LTR has similar structures of the LQG/LTR, but this method can consider nonlinear effects in designing the controller. Thus, the QLQG/LTR control system is robust to hard nonlinearities such as Coulomb friction, dead-zone, etc. Forma given hard non-linear system through experiments, it is shown that the tracking performance of the QLQG/LTR control system can be very improved that the LQF/LTR control system.

  • PDF

2행정 디젤엔진의 소기압력이 사이클변동에 미치는 영향에 관한 연구 (A Study on the Effect of Cycle Variation on Scavenging pressure in 2-Stroke Diesel Engine)

  • 윤창식;김치원;김기복
    • 한국산업융합학회 논문집
    • /
    • 제19권3호
    • /
    • pp.154-159
    • /
    • 2016
  • Recently it has been focused that the automobile engine has developed in a strong upward tendency for the use of the high viscosity and poorer quality fuels in achieving the high performance, fuel economy, and emission reduction. Therefore it is not easy to solve the problems between low specific fuel consumption, and exhaust emission control at automotive engine In this study, it is designed and used the test bed which is installed with fuel injector controller. In addition to equipped engine using CRDI by controlling the injection timing with modulator, it has tested and analyzed the engine cycle variation characteristics, as it is varied that they are the operating parameters: fuel injected quantity, injection timing, engine speed and scavenging pressure.

2행정 디젤엔진의 소기조건 변화에 따른 엔진의 성능특성에 관한 연구 (A Study on Engine Performance Characteristics with Scavenging Condition Variation in 2-Stroke Diesel Engine)

  • 김기복
    • 한국산업융합학회 논문집
    • /
    • 제22권3호
    • /
    • pp.259-264
    • /
    • 2019
  • In this study, we experiment by making and designing of compression ignition diesel engine witch has air cooling, 2-cylinder and 2-strokes. Also, we make controller witch can control injection timing and period by arbitrary manual operation for change of injection timing. We also study experimentally in change about pressure and power of combustion chamber by increasing density of air which comes into cylinder because of increasing scavenging pressure. Through this, we confirmed that output change and scavenging pressure can develop performance of the engine by scavenging efficiency of a chamber and development of volume efficiency.

차량 탑재형 배터리 충전기의 인터리브드 부스트 PFC 컨버터 제어시스템 설계 및 구현 (Design and Implementation of a Control System for the Interleaved Boost PFC Converter in On-Board Battery Chargers)

  • 이준혁;정광순;이경중;정재엽;김호경;홍성수;안현식
    • 전기학회논문지
    • /
    • 제65권5호
    • /
    • pp.843-850
    • /
    • 2016
  • In this paper, we propose a digital controller design process for the interleaved type of a boost PFC (Power Factor Correction) converter which can disperse the heat of the switching devices due to the interleaved topology. We establish a mathematical model of a boost PFC converter and propose a controller design method based on the root locus. The performance of the designed controller is verified by simulations. The measurement of the input voltage, inductor currents, and the converter output link voltage are needed for the control of the converter system which consists of a power unit and a control unit where a high-performance 32-bit microcontroller is used. The adjustment of A/D conversion timing is also needed to avoid high frequency noise generated when the switches on/off. It is illustrated by the real experiments that the designed control system with the properly adjusted ADC timing satisfies the given performance specifications of the interleaved boost PFC converter in the on-board slow battery charger.

Quasi-LQG/$H_{infty}$/LTR Control for a Nonlinear Servo System with Coulomb Friction and Dead-zone

  • Han, Seong-Ik
    • International Journal of Precision Engineering and Manufacturing
    • /
    • 제1권2호
    • /
    • pp.24-34
    • /
    • 2000
  • In this paper we propose a controller design method, called Quasi-LQG/$H_{\infty}$/LTR for nonlinear servo systems with hard nonlinearities such as Coulomb friction, dead-zone. Introducing the RIDF method to model Coulomb friction and dead-zone, the statistically linearized system is built. Then, we consider $H_{\infty}$ performance constraint for the optimization of statistically linearized systems, by replacing a covariance Lyapunov equation into a modified Riccati equation of which solution leads to an upper bound of the LQG performance. As a result, the nonlinear correction term is included in coupled Riccati equation, which is generally very difficult to thave a numerical solution. To solve this problem, we use the modified loop shaping technique and show some analytic proofs on LTR condition. Finally, the Quasi-LQG/$H_{\infty}$/LTR controller for a nonlinear system is synthesized by inverse random input describing function techniques (ITIDF). It is shown that the proposed design method has a better performance robustness to the hard nonlinearity than LQG/$H_{\infty}$/LTR method via simulations and experiments for the timing-belt driving servo system that contains the Coulomb friction and dead-zone.

  • PDF

SOPC를 활용한 NG-SDH 망용 DP-PLL 제어기 설계에 관한 연구 (A Study on the DP-PLL Controller Design using SOPC for NG-SDH Networks)

  • 선권석;박민상
    • 융합신호처리학회논문지
    • /
    • 제15권4호
    • /
    • pp.169-175
    • /
    • 2014
  • NG-SDH 시스템은 광케이블 통하여 연결된 네트워크이다. 네트워크 동기제어기는 광전송시스템에서 데이터 동기에서 필수적이다. 본 논문에서 SOPC(system on a programmable chip) 설계 기술을 활용하여 네트워크 동기제어기를 설계한다. 설계를 위해 Altera사의 FPGA를 활용하고, FPGA안에는 32Bit CPU, DPRAM(dual port ram), 디지털 입출력포트, 송신 및 수신 프레이머, 위상차 검출기 등이 포함되어있다. 설계된 네트워크 동기제어기는 ITU-T G. 813에서 권고하는 동기기준(일시적인 응답에서의 MTIE, 원더 특성시 MTIE 및 TDEV, Holdover시 MTIE)을 만족함을 확인할 수 있다.

Development of cryogenic free-piston reciprocating expander utilizing phase controller

  • Cha, Jeongmin;Park, Jiho;Kim, Kyungjoong;Jeong, Sangkwon
    • 한국초전도ㆍ저온공학회논문지
    • /
    • 제18권2호
    • /
    • pp.42-47
    • /
    • 2016
  • A free-piston reciprocating expander is a device which operates without any mechanical linkage to a stationary part. Since the motion of the floating piston is only controlled by the pressure difference at two ends of the piston, this kind of expander may indispensably require a sophisticated active control system equipped with multiple valves and reservoirs. In this paper, we have suggested a novel design that can further reduce complexity of the previously developed cryogenic free-piston expander configuration. It is a simple replacement of both multiple valves and reservoirs by a combination of an orifice valve and a reservoir. The functional characteristic of the integrated orifice-reservoir configuration is similar to that of a phase controller applied in a pulse tube refrigerator so that we designate the one as a phase controller. Depending on the orifice valve size in the phase controller, the different PV work which affects the expander performance is generated. The numerical model of this unique free-piston reciprocating expander utilizing a phase controller is established to understand and analyze quantitatively the performance variation of the expander under different valve timing and orifice valve size. The room temperature experiments are carried out to examine the performance of this newly developed cryogenic expander.

H.264 Encoder용 Direct Memory Access (DMA) 제어기 설계 (A Design of Direct Memory Access (DMA) Controller For H.264 Encoder)

  • 송인근
    • 한국정보통신학회논문지
    • /
    • 제14권2호
    • /
    • pp.445-452
    • /
    • 2010
  • 본 논문에서는 Full 하드웨어 기반 베이스라인 프로파일 레벨 3 규격 H.264 인코더 코덱에서 사용할 수 있는 Direct Memory Access (DMA) 제어기를 설계하였다. 설계한 모듈은 CMOS Image Sensor(CIS)로부터 영상을 입력 받아 메모리에 저장한 후 인코더 코덱 모듈의 동작에 맞춰 원영상과 참조영상을 각각 한 매크로블록씩 메모리로부터 읽어서 공급하거나 저장하며, DMA 제어기의 한 매크로블록씩 처리하는데 478 cycle을 소요한다. 설계한 구조를 검증하기 위해 JM 9.4와 호환되는 Reference Encoder C를 개발하였으며, Encoder C로부터 Test Vector를 추출하여 설계한 회로를 검증하였다. 제안한 DMAC 제어기의 Cycle은 Xilinx MIG를 사용한 Cycle 보다 40%의 감소를 나타내었다.