• Title/Summary/Keyword: Time-Efficiency of Algorithm

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A Study on the Learning Efficiency of Multilayered Neural Networks using Variable Slope (기울기 조정에 의한 다층 신경회로망의 학습효율 개선방법에 대한 연구)

  • 이형일;남재현;지선수
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.20 no.42
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    • pp.161-169
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    • 1997
  • A variety of learning methods are used for neural networks. Among them, the backpropagation algorithm is most widely used in such image processing, speech recognition, and pattern recognition. Despite its popularity for these application, its main problem is associated with the running time, namely, too much time is spent for the learning. This paper suggests a method which maximize the convergence speed of the learning. Such reduction in e learning time of the backpropagation algorithm is possible through an adaptive adjusting of the slope of the activation function depending on total errors, which is named as the variable slope algorithm. Moreover experimental results using this variable slope algorithm is compared against conventional backpropagation algorithm and other variations; which shows an improvement in the performance over pervious algorithms.

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A Study on Hybrid Image Coder Using a Reconfigurable Multiprocessor System (Study II : Parallel Algorithm Implementation (재구성 가능한 다중 프로세서 시스템을 이용한 혼합 영상 부호화기 구현에 관한 연구(연구 II : 병렬 알고리즘 구현))

  • Choi, Sang-Hoon;Lee, Kwang-Kee;Kim, In;Lee, Yong-Kyun;Park, Kyu-Tae
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.30B no.10
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    • pp.13-26
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    • 1993
  • Motion picture algorithms are realized on the multiprocessor system presented in the Study I. For the most efficient processing of the algorithms, pipelining and geometrical parallel processing methods are employed, and processing time, communication load and efficiency of each algorithm are compared. The performance of the implemented system is compared and analysed with reference to MPEG coding algorithm. Theoretical calculations and experimental results both shows that geometrical partitioning is a more suitable parallel processing algorithm for moving picture coding having the advantage of easy algorithm modification and expansion, and the overall efficiency is higher than pipelining.

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A Classification-Based Virtual Machine Placement Algorithm in Mobile Cloud Computing

  • Tang, Yuli;Hu, Yao;Zhang, Lianming
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.10 no.5
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    • pp.1998-2014
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    • 2016
  • In recent years, cloud computing services based on smart phones and other mobile terminals have been a rapid development. Cloud computing has the advantages of mass storage capacity and high-speed computing power, and it can meet the needs of different types of users, and under the background, mobile cloud computing (MCC) is now booming. In this paper, we have put forward a new classification-based virtual machine placement (CBVMP) algorithm for MCC, and it aims at improving the efficiency of virtual machine (VM) allocation and the disequilibrium utilization of underlying physical resources in large cloud data center. By simulation experiments based on CloudSim cloud platform, the experimental results show that the new algorithm can improve the efficiency of the VM placement and the utilization rate of underlying physical resources.

Development of Advanced Phase-Shedding Control Algorithm for DVR Power Supply (DVR 전원용 진보된 Phase-Shedding 제어 알고리즘 개발)

  • Lee, Jun-Young;Kim, Cheol-Min;Kim, Jong-Soo
    • The Transactions of the Korean Institute of Power Electronics
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    • v.26 no.6
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    • pp.397-403
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    • 2021
  • In this paper, phase shedding algorithm that measuring to converter's input and output parameter during real-time to control the number of driving converters is proposed. The proposed phase-shedding algorithm drives the DVR power supply with the optimal converter's combination without the loss calculation curve and the lookup table in which the efficiency is measured in advance. The proposed algorithm was implemented through a digital controller and verified in a two-modular LLC converter with a single rated power of 60 Win a 120 W DVR power supply system. Experimental results are presented to prove the validity of the proposed algorithm.

Implementation and Validation of Traffic Light Recognition Algorithm for Low-speed Special Purpose Vehicles in an Urban Autonomous Environment (저속 특장차의 도심 자율주행을 위한 신호등 인지 알고리즘 적용 및 검증)

  • Wonsub, Yun;Jongtak, Kim;Myeonggyu, Lee;Wongun, Kim
    • Journal of Auto-vehicle Safety Association
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    • v.14 no.4
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    • pp.6-15
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    • 2022
  • In this study, a traffic light recognition algorithm was implemented and validated for low-speed special purpose vehicles in an urban environment. Real-time image data using a camera and YOLO algorithm were applied. Two methods were presented to increase the accuracy of the traffic light recognition algorithm, and it was confirmed that the second method had the higher accuracy according to the traffic light type. In addition, it was confirmed that the optimal YOLO algorithm was YOLO v5m, which has over 98% mAP values and higher efficiency. In the future, it is thought that the traffic light recognition algorithm can be used as a dual system to secure the platform safety in the traffic information error of C-ITS.

High Repair Efficiency BIRA Algorithm with a Line Fault Scheme

  • Han, Tae-Woo;Jeong, Woo-Sik;Park, Young-Kyu;Kang, Sung-Ho
    • ETRI Journal
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    • v.32 no.4
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    • pp.642-644
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    • 2010
  • With the rapid increase occurring in both the capacity and density of memory products, test and repair issues have become highly challenging. Memory repair is an effective and essential methodology for improving memory yield. An SoC utilizes built-in redundancy analysis (BIRA) with built-in self-test for improving memory yield and reliability. This letter proposes a new heuristic algorithm and new hardware architecture for the BIRA scheme. Experimental results indicate that the proposed algorithm shows near-optimal repair efficiency in combination with low area and time overheads.

Elevator Algorithm Design Using Time Table Data (시간표 데이터를 이용한 엘리베이터 알고리즘 설계)

  • Park, Jun-hyuk;Kyoung, Min-jun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2022.05a
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    • pp.122-124
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    • 2022
  • Handling Passenger Traffic is the main challenge for designing an elevator group-control algorithm. Advanced control systems such as Hyundai's Destination Selection System(DSS) lets passengers select the destination by pressing on a selecting screen, and the systems have shown great efficiency. However, the algorithm cannot be applied to the general elevator control system due to the expensive cost of the technology. Often many elevator systems use Nearest Car(NC) algorithms based on the SCAN algorithm, which results in time efficiency problems. In this paper, we designed an elevator group-control algorithm for specific buildings that have approximate timetable data for most of the passengers in the building. In that way, it is possible to predict the destination and the location of passenger calls. The algorithm consists of two parts; the waiting function and the assignment function. They evaluate elevators' actions with respect to the calls and the overall situation. 10 different timetables are created in reference to a real timetable following midday traffic and interfloor traffic. The specific coefficients in the function are set by going through the genetic algorithm process that represents the best algorithm. As result, the average waiting time has shortened by a noticeable amount and the efficiency was close to the known DSS result. Finally, we analyzed the algorithm by evaluating the meaning of each coefficient result from the genetic algorithm.

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A Dynamic Voltage Scaling Algorithm for Low-Energy Hard Real-Time Applications using Execution Time Profile (실행 시간 프로파일을 이용한 저전력 경성 실시간 프로그램용 동적 전압 조절 알고리즘)

  • 신동군;김지홍
    • Journal of KIISE:Computer Systems and Theory
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    • v.29 no.11
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    • pp.601-610
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    • 2002
  • Intra-task voltage scheduling (IntraVS), which adjusts the supply voltage within an individual task boundary, is an effective technique for developing low-power applications. In this paper, we propose a novel intra-task voltage scheduling algorithm for hard real-time applications based on average-case execution time. Unlike the conventional IntraVS algorithm where voltage scaling decisions are based on the worst-case execution cycles, tile proposed algorithm improves the energy efficiency by controlling the execution speed based on average-case execution cycles while meeting the real-time constraints. The experimental results using an MPEG-4 decoder program show that the proposed algorithm reduces the energy consumption by up to 34% over conventional IntraVS algorithm.

Combine Harvest Scheduling Program for Rough Rice using Max-coverage Algorithm

  • Lee, Hyo-Jai;Kim, Oui-Woung;Kim, Hoon;Han, Jae-Woong
    • Journal of Biosystems Engineering
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    • v.38 no.1
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    • pp.18-24
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    • 2013
  • Purpose: This study was conducted to develop an optimal combine scheduling program using Max-Coverage algorithm which derives the maximum efficiency for a specific location in harvest seasons. Methods: The combine scheduling program was operated with information about combine specification and farmland. Four operating types (Max-Coverage algorithm type, Boustrophedon path type, max quality value type, and max area type) were selected to compare quality and working capacity. Result: The working time of Max-Coverage algorithm type was shorter than others, and the total quality value of Max-Coverage algorithm and max quality value type were higher than others. Conclusion: The developed combine scheduling program using Max-Coverage algorithm will provide optimal operation and maximum quality in a limited area and time.

Gen2-Based Tag Anti-collision Algorithms Using Chebyshev's Inequality and Adjustable Frame Size

  • Fan, Xiao;Song, In-Chan;Chang, Kyung-Hi;Shin, Dong-Beom;Lee, Heyung-Sub;Pyo, Cheol-Sig;Chae, Jong-Suk
    • ETRI Journal
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    • v.30 no.5
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    • pp.653-662
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    • 2008
  • Arbitration of tag collision is a significant issue for fast tag identification in RFID systems. A good tag anti-collision algorithm can reduce collisions and increase the efficiency of tag identification. EPCglobal Generation-2 (Gen2) for passive RFID systems uses probabilistic slotted ALOHA with a Q algorithm, which is a kind of dynamic framed slotted ALOHA (DFSA), as the tag anti-collision algorithm. In this paper, we analyze the performance of the Q algorithm used in Gen2, and analyze the methods for estimating the number of slots and tags for DFSA. To increase the efficiency of tag identification, we propose new tag anti-collision algorithms, namely, Chebyshev's inequality, fixed adjustable framed Q, adaptive adjustable framed Q, and hybrid Q. The simulation results show that all the proposed algorithms outperform the conventional Q algorithm used in Gen2. Of all the proposed algorithms, AAFQ provides the best performance in terms of identification time and collision ratio and maximizes throughput and system efficiency. However, there is a tradeoff of complexity and performance between the CHI and AAFQ algorithms.

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