• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.424-424
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• 2008

Dye-sensitized Solar Cell (DSC) is a new type of solar cell by using photocatalytic properties of $TiO_2$. The electric potential distribution in DSCs has played a major role in the operation of such cells. Models based on a built-in electric field which sets the upper limit for the open circuit voltage(Voc) and/or the possibility of a Schottky barrier at the interface between the mesoporous wide band gap semiconductor and the transparent conducting substrate have been presented. $TiO_2$ thin films were deposited on the FTO substrate by Nd:YAG Pulsed Laser Deposition(PLD) at room temperature and post-deposition annealing at $500^{\circ}C$ in flowing $O_2$ atmosphere for 1 hour. The structural properties of $TiO_2$ thin films have investigated by X-ray diffraction(XRD) and atomic force microscope(AFM). Thickness of $TiO_2$ thin films were controlled deference deposition time and measurement by scanning electron microscope(SEM). Then we manufactured a DSC unit cells and I-V and efficiency were tested using solar simulator.

• Journal of the Korean Ceramic Society
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• v.43 no.6 s.289
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• pp.362-368
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• 2006

Epitaxial $Ba_{0.5}Sr_{0.5}TiO_3$ (BSTO) thin films have been grown on TiN buffered Si (001) substrates by Pulsed Laser Deposition (PLD) method and the effects of substrate temperature and oxygen partial pressure during the deposition on their dielectric properties and crystallinity were investigated. The crystal orientation, epitaxy nature, and microstructure of oxide thin films were investigated using X-Ray Diffraction (XRD) and Transmission Electron Microscopy (TEM). Thin films were prepared with laser fluence of $4.2\;J/cm^2\;and\;3\;J/cm^2$, repetition rate of 8 Hz and 10 Hz, substrate temperatures of $700^{\circ}C$ and ranging from $350^{\circ}C\;to\;700^{\circ}C$ for TiN and oxide respectively. BSTO thin-films were grown on TiN-buffered Si substrates at various oxygen partial pressure ranging from $1{\times}10^{-4}$ torr to $1{\times}10^{-5}$ torr. The TiN buffer layer and BSTO thin films were grown with cube-on-cube epitaxial orientation relationship of $[110](001)_{BSTO}{\parallel}[110](001)_{TiN}{\parallel}[110](001)_{Si}$. The crystallinity of BSTO thin films was improved with increasing substrate temperature. C-axis lattice parameters of BSTO thin films, calculated from XRD ${\theta}-2{\theta}$ scans, decreased from 0.408 m to 0.404 nm and the dielectric constants of BSTO epitaxial thin films increased from 440 to 938 with increasing processing oxygen partial pressure.

• Korean Journal of Materials Research
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• v.28 no.4
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• pp.235-240
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• 2018

We propose a speedy two-step deposit process to form an Au electrode on hole transport layer(HTL) without any damage using a general thermal evaporator in a perovskite solar cell(PSC). An Au electrode with a thickness of 70 nm was prepared with one-step and two-step processes using a general thermal evaporator with a 30 cm source-substrate distance and $6.0{\times}10^{-6}$ torr vacuum. The one-step process deposits the Au film with the desirable thickness through a source power of 60 and 100 W at a time. The two-step process deposits a 7 nm-thick buffer layer with source power of 60, 70, and 80 W, and then deposits the remaining film thickness at higher source power of 80, 90, and 100 W. The photovoltaic properties and microstructure of these PSC devices with a glass/FTO/$TiO_2$/perovskite/HTL/Au electrode were measured by a solar simulator and field emission scanning electron microscope. The one-step process showed a low depo-temperature of $88.5^{\circ}C$ with a long deposition time of 90 minutes at 60 W. It showed a high depo-temperature of $135.4^{\circ}C$ with a short deposition time of 8 minutes at 100 W. All the samples showed an ECE lower than 2.8 % due to damage on the HTL. The two-step process offered an ECE higher than 6.25 % without HTL damage through a deposition temperature lower than $88^{\circ}C$ and a short deposition time within 20 minutes in general. Therefore, the proposed two-step process is favorable to produce an Au electrode layer for the PSC device with a general thermal evaporator.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2002.02a
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• pp.339-339
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• 2002

In the RABiTS approach to coated conductor development, successful (both economic and technological) depends on the refinement and optimization of each of three important components: the metal tape substrate, the buffer layer(s), and the HTS layer. Here we will report on the ORNL approach and progress in each of these areas. - Most applications will require metal tapes with low magnetic hysteresis, mechanical strength, and excellent crystalline texture. Some of these requirements are competing. We report on progress in obtaining a good combination of these characteristics on metal alloys of Ni-Cr and Ni-W. - The deposition of appropriate buffer layers is a crucial step. Recently, base research has shown that the presence of a stable sulfur superstructure present on the metal surface is needed for the nucleation and epitaxial growth of vapor-deposited seed buffer layers such as YSZ, CeO$_2$ and SrTiO$_3$. We report on the details and control of this superstructure for nickel tapes, as well as recent results for Cu and Ni-13%Cr. - Processes for deposition of the HTS coating must economically provide large values of the figure-of-merit for conductors, current x length. At ORNL, we have devoted efforts to a precursor/post-annealing approach to YBCO coatings, for which the deposition and reaction steps are separate. We describe motivation for and progress toward developing this approach. - Finally, we address some issues for the implementation of coated conductors in real applications, including the need for texture control and electrical stabilization of the HTS coating.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.6
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• pp.646-651
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• 2018

This paper reports that the electronic properties at a $P3HT/TiO_2$ interface associated with exciton dissociation and transport can be tailored by the insertion of a graphene quantum dot (GQD) layer. For donor/acceptor interface modification in an $ITO/TiO_2/P3HT/Al$ photovoltaic (PV) device, a continuous GQD film was prepared by a sonication treatment in solution that simplifies the conventional processes, including laser fragmentation and hydrothermal treatment, which limits a variety of component layers and involves low cost processing. The high conductivity and favorable energy alignment for exciton dissociation of the GQD layer increased the fill factor and short circuit current. The origin of the improved parameters is discussed in terms of the broad light absorption and enhanced interfacial carrier transport.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.11
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• pp.921-925
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• 2000

Characteristics of Pb(Mg, Nb)O$_3$-Pb(Zr, Ti)O$_3$system thick films fabricated by a screen printing method were investigated. The buffer layer were coated with various thickness of Ag-Pd by screen printing to investigate the effect as a diffusion barrier and deposited Pt as a electrode by sputtering on Ag-Pb layer. The printed thick films were burned out at 650$\^{C}$ and sintered at 950$\^{C}$ in O$_2$condition for each 20, 60min after printing with 350mesh screen. The thickness of piezoelectric thick film was 15∼20㎛ and Ag-Pb layer acted as a diffusion barrier above 3㎛ thickness. The PMN-PZT thick films were screen printed on Pt/Ag-Pb(6m) and sintered by 2nd step (650$\^{C}$/20min and 950$\^{C}$/1h) using paste mixed PMN-PZT and binder in the ratio of 70:30, and the remnant polarization of thick film was 9.1$\mu$C/㎠ in this conditions.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.280-280
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• 2007

$Pb(Zr,Ti)O_3$ (PZT) 강유전체 박막은 높은 잔류 분극 (remanent polarization) 특성 때문에 현재 강유전체 메모리 (FeRAM) 소자에 적용하기 위하여 가장 활발히 연구되고 있다. 그런데 PZT 물질은 피로 (fatigue) 및 임프린트 (imprint) 등의 장시간 신뢰성 (long-term reliability) 특성이 취약한 단점을 가지고 있다. 이러한 신뢰성 문제를 해결할 수 있는 효과적인 방법 중의 하나는 $IrO_2$, $SrRuO_3$(SRO) 등의 산화물 전극을 사용하는 것이다. 많은 산화물 전극 중에서 SRO는 PZT와 비슷한 pseudo-perovskite 결정구조를 갖고 격자 상수도 비슷하여, PZT 커패시터의 강유전 특성 및 신뢰성을 향상시키는데 매우 효과적인 것으로 알려져 있다. 따라서 본 연구는 PZT 커패시터에 적용하기 위하여 SRO 박막을 증착하고 이의 전기적 특성 및 미세구조를 분석하고자 하였다. 또 실제로 SRO 박막을 상부전극과 PZT 사이의 버퍼 층 (buffer layer)으로 적용한 경우의 커패시터 특성도 평가하였다. 먼저 다결정 SRO 박막을 $SiO_2$/Si 기판 위에 DC 마그네트론 스퍼터링 법 (DC magnetron sputtering method)으로 증착하였다. 그 다음 이러한 SRO 박막의 미세구조, 결정성 및 전기적 특성이 증착 조건들의 변화에 따라서 어떤 경향성을 보이는지를 평가하였다. 기판 온도는 $350\;{\sim}\;650^{\circ}C$ 범위에서 변화시켰고, 증착 파워는 500 ~ 800 W 범위에서 변화시켰다. 또 Ar+$O_2$ 혼합 가스에서 산소의 혼합 비율을 20 ~ 50% 범위에서 변화시켰다. 이러한 실험 결과 SRO 박막의 전기적 특성 및 미세 구조는 기판의 증착 온도에 따라서 가장 민감하게 변함을 관찰할 수 있었다. 다른 증착 조건과 무관하게 $450^{\circ}C$ 이상의 온도에서 증착된 SRO 박막은 모두 주상정 구조 (columnar structure)를 형성하며 (110) 방향성을 강하게 나타내었다. 가장 낮은 전기 저항은 $550^{\circ}C$ 증착 온도에서 얻을 수 있었는데, 그 값은 약 $440\;{\mu}{\Omega}{\cdot}cm$ 이었다. SRO 버퍼 충을 적용하여 제작한 PZT 커패시터의 잔류 분극 (Pr) 값은 약 $30\;{\mu}C/cm^2$ 정도로 매우 높은 값을 나타내었고, 피로 손실 (fatigue loss)도 $1{\times}10^{11}$ 스위칭 사이클 후에 약 11% 정도로 매우 양호한 값을 나타내었다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.197-198
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• 2005

본 논문에서는 p-type (100)Si. (100)MgO 그리고 MgO/Si 기판 위에 RF Magnetron sputtering 법으로 $Ba_{0.5}Sr_{0.5}TiO_3$(BST) 박막을 증착 후 $600^{\circ}C$ 의 질소분위에서 RTA(Rapid Thermal Annealing)를 이용한 1 분간의 고온 급속열처리를 하였다. XRD 측정결과 모든 기판에서 (110) $Ba_{0.5}Sr_{0.5}TiO_3$의 주피크가 관찰되어졌고, 열처리 후 피크 세기가 증가함을 확인할 수 있었다. C-V 특성에서 각각의 기판에서 측정된 커패시턴스 값으로 계산된 유전율은 120(bare Si), 305(MgO/Si) 그리고 310(MgO)이었다. 누설 전류 특성에서는 150KV/cm이내의 인가전계에서 0.1$uA/cm^2$이하의 안정된 누설전류값을 보여주었다. 결론적으로 MgO 버퍼층을 이용한 기판이 BST 박막의 증착을 위한 기판으로써 효과적임을 알 수 있었다.

• Journal of the Korean Ceramic Society
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• v.31 no.12
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• pp.1429-1436
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• 1994

We have prepared Ba0.5Sr0.5TiO3 thin films on Si substrate without buffer layer. Deposition was carried out by off-axis rf magnetron sputtering method using Ba0.5Sr0.5TiO3 stoichiometric target. The substrate temperature was changed from 40$0^{\circ}C$ to $700^{\circ}C$ during deposition. As the substrate temperature increased, relative intensity of (110) peak increased up to $600^{\circ}C$, however preferred orientation changed from (110) to (h00) beyond $650^{\circ}C$ of substrate temperature. Deposited films showed microstructures with fine grains whose diameters are less than 100 nm, and columnar structure was observed in the cross-sectional SEM micrograph. AES depth profile showed no significant diffusion at the interfacial reaction area. The effective dielectric constant of films showed maximum value at $600^{\circ}C$, and the leakage current increased with increasing substrate temperature, which may be ascribed to the crystallization of amorphous phases at grain boundary.

• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.1
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• pp.1-14
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• 2001

Current status and prospects of FET-type FeRAMs (ferroelectric random access memories) are reviewed. First, it is described that the most important issue for realizing FET-type FeRAMs is to improve the data retention characteristics of ferroelectric-gate FETs. Then, necessary conditions to prolong the retention time are discussed from viewpoints of materials, device structure, and circuit configuration. Finally, recent experimental results related to the FET-type memories are introduced, which include optimization of a buffer layer that is inserted between the ferroelectric film and a Si substrate, development of a new ferroelectric film with a small remnant polarization value, proposal and fabrication of a 1T2C-type memory cell with good retention characteristics, and so on.