• 수산해양기술연구
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• 제60권1호
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• pp.71-79
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• 2024

In compliance with environmental regulations at sea and the introduction of unmanned autonomous ships, electric propulsion ships are garnering significant attention. Induction machines used as propulsion electric motor (PEM) have maintenance advantages, but speed control is very complicated and difficult. One of the most commonly used techniques for speed control is DTC (direct torque control). DTC is simple in the reference frame transformation and the stator flux calculation. Meanwhile, two-level and three-level voltage source inverters (VSI) are predominantly used. The three-level VSI has more flexibility in voltage space vector selection compared to the two-level VSI. In this paper, speed is controlled using the DTC method based on the specifications of the PEM. The speed controller employs a PI controller with anti-windup functionality. In addition, the characteristics of the two-level VSI and three-level VSI are compared under identical conditions. It was confirmed through simulation that proper control of speed and torque has been achieved. In particular, the torque ripple was small and control was possible with a low DC voltage at low speed in the three-level VSI. The study confirmed that the application of DTC, using a three-level VSI, contributes to enhancing the system's response performance.

• Journal of Power Electronics
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• 제9권5호
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• pp.679-690
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• 2009

The paper presents a new photovoltaic inverter for stand-alone induction motor application. The proposed system is composed of two stages. First stage is for the photovoltaic dc power feeding and second stage is dedicated to the motor-inverter subsystem and control technique. A direct torque control (DTC) with a novel switching strategy for motor torque ripple minimization is introduced. The novel DTC strategy is based on selecting a suitable voltage vector group for motor torque ripple minimization. A three-level voltage source inverter (VSI) is used instead of a two level inverter because the first has more available vectors and lower ripples in the output current and flux than the second, thus it has lower torque ripples. The photovoltaic array and battery bank are sized and the configuration is indicated based on sun-hour methodology. Simulation results show a comparison between three systems; two level VSI with conventional DTC strategy, three level VSI with conventional DTC, and the proposed system that has a novel DTC switching strategy applied to three level VSI. The results show that the proposed system has lower ripples in the current, flux and torque of the motor.

• Journal of Electrical Engineering and Technology
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• 제9권2호
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• pp.489-500
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• 2014

This paper presents a simple modified unipolar carrier-based pulsewidth modulation (CB-PWM) strategy for the three-level neutral-point-clamped (NPC) voltage source inverter (VSI). Analytical expressions for the relationship between modulation reference signals and output voltages are derived. The proposed modulation technique for the three-level NPC VSI includes the maximum and minimum of the three-phase sinusoidal reference voltages with zero-sequence voltage injection concept. The proposed modified CB-PWM strategy incorporates a novel method that requires only of one triangular carrier wave for generate the gating pulses in three-level NPC VSI. It has the advantages of being simplifying the algorithm with no need of complex two/multi-carrier pulsewidth modulation or space vector modulation (SVM) and it's also simple to implement. The possibility of the proposed CB-PWM technique has been verified though computer simulation and experimental results.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 F
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• pp.1954-1956
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• 1998

The three-level voltage source inverter (VSI) is good topology for high voltage and high power applications where no semiconductor devices are available. However, it has an inherent problem of switching loss and midpoint charge balance. Therefore, this paper presents two ways. The one is to adopt ZCT soft-switching method to the conventional three-level VSI. The another is to be proposed the method of the midpoint charge balance in three-level VSI. To prove the proposed topology, the paper presents a comprehensive evaluation with theoretical analysis, simulation and experimental results.

• Journal of Power Electronics
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• 제19권2호
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• pp.413-430
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• 2019

This paper presents an optimum hybrid SVPWM technique for three-level voltage source inverters (VSIs). The proposed hybrid SVPWM technique aims to minimize total harmonic distortion (THD). A new parameter is introduced to incorporate the heterogeneous nature of switching sequences of SVPWM technique. The proposed hybrid SVPWM technique is implemented on a low-cost PIC microcontroller (PIC18F452) and verified experimentally with a 2 KVA three-phase three-level insulated gate bipolar transistor-based VSI. Optimum switching sequence results in the three-level inverter configuration are demonstrated. The proposed hybrid SVPWM technique improves the THD performance by 17.3% compared with the best available three-level SVPWM technique.

• Journal of Power Electronics
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• 제14권6호
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• pp.1272-1280
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• 2014

This paper presents solutions for fault detection and diagnosis of two-level, three phase voltage-source inverter (VSI) topologies with IGBT devices. The proposed solutions combine redundant standby VSI structures and contactors (or relays) to improve the fault-tolerant capabilities of power electronics in applications with safety requirements. The suitable combination of these elements gives the inverter the ability to maintain energy processing in the occurrence of several failure modes, including short-circuit in IGBT devices, thus extending its reliability and availability. A survey of previously developed fault-tolerant VSI structures and several aspects of failure modes, detection and isolation mechanisms within VSI is first discussed. Hardware solutions for the protection of power semiconductors with fault detection and diagnosis mechanisms are then proposed to provide conditions to isolate and replace damaged power devices (or branches) in real time. Experimental results from a prototype are included to validate the proposed solutions.

• 전력전자학회논문지
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• 제26권2호
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• pp.120-126
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• 2021

DC-link capacitors are one of the main components in two-level three-phase voltage source inverters (VSIs); they provide the pulsating input current and stabilize the vacillating DC-link voltage. Ideally, the larger the capacitance of DC-link capacitors, the better the DC-link voltage stabilizes. However, high capacitance increases the cost and decreases the power density of VSI systems. Therefore, the capacitance should be chosen carefully on the basis of the DC-link voltage ripple requirement. However, the DC-link voltage ripple is dependent on the pulse-width modulation (PWM) strategy. This study especially presents a DC-link voltage ripple analysis when the minimum loss discontinuous PWM strategy is applied. Furthermore, an equation for the selection of the minimum capacitance of DC-link capacitors is proposed. Experimental results with R-L loads are also provided to verify the effectiveness of the presented analysis.

• 대한전자공학회논문지
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• 제25권1호
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• pp.42-48
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• 1988

MM(multimode) PWM(pulse width modulation) Suitable for high performance and harmonic effects minimization of VSI (voltabge source invertetr)-IM (induction motor)drive system is proposed. The approximated optimal, suboptimal and optimal PWM are implemented in the low frequency range, while square wave operation is realized in the hibh frequency range. The pulse width Modulator is capable of generating control signals to a transistorized inverter operating at about 1KHz. All functions except digital comparison have been implemented in softyware making the scheme economical, flexible and reliable. Pulse width modulator is built and tested experimentally. In order to confirm the effectiveness and the reliability of the theoretical proposition, this scheme is applied to 1Hp, Three phase IM. As results, it is concluded that the scheme of MM PWM is superior to other conventional switching scheme through the discussions or analysis carried out on the items such as line-to-line voltage, current and spectrum of current harmonic components observed at the output terminal of inverter, noise level of motor.

• 한국통신학회논문지
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• 제15권11호
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• pp.886-897
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• 1990

본 논문은 PWM 패턴의 연적 펄스폭 사이에서 정의된 선형관계에 기초한 새로운 optimal PWM 방식을 제시하였다. 새로운 PWM 방식에서 펄스폭 계산은 MW와 CW의 방정식에 의존하지않고 수행할 수 있다. 이 방식에 의해 마이크로프로세서로 제어되는 인버터를 위한 PWM 패턴은 패턴의 연적 펄스폭에서 최적 증분치를 얻으므로서 쉽게 구성할 수 있다. 더구나, PWM 인버터의 출력에서 고조도레벨은 본 PWM패턴이 최소 THD를 기초로 선정되기 때문에 항상 적다. 본 방식을 1(HP), 삼상 유도전동기에 적용시켜 종래의 regular PWM 방식과 비교해 보았다. 계산 및 실험의 결과에서 새로운 optiaml PWM 방식이 VSI-PWM 인버터에서 고조도를 최소화하기 위한 효과적인 일반화 연구임을 보였다.

• Journal of Power Electronics
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• 제12권2호
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• pp.285-293
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• 2012

Multilevel inverters have gained attention in high-power applications due to their numerous advantages in comparison with conventional two-level inverters. In this paper a simplified Space-Vector Modulation (SVM) algorithm for a three-level Neutral-Point Clamped (NPC) inverter is implemented on a Freescale$^{(R)}$ DSP56F8037. The algorithm is based on a simplification of the space-vector diagram for a three-level inverter so that it can be used with a two-level inverter. Once the simplification has been achieved, calculation of the dwell times and the switching sequences are carried out in the same way as for the two-level SVM method. Details of the hardware design are included. Experimental results are analyzed to validate the performance of the simplified algorithm.