• 제목/요약/키워드: Thin-Film Patterning Process

검색결과 86건 처리시간 0.021초

전도성 볼을 이용한 진동센서의 제작 및 특성 (Fabrication and characteristics of vibration sensor using conductive ball)

  • 장성욱;조용수;공성호;최시영
    • 센서학회지
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    • 제14권6호
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    • pp.374-380
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    • 2005
  • Vibration sensors have a wide scope of applications in the field of monitoring systems that needs to perceive an undesirable physical vibration before a critical failure occurs in a system, and then costly unplanned repairs can be avoided. The conventional vibration sensors developed so far have many disadvantages, such as complex manufacturing process, bulkiness, high cost, less reliability and so on. This paper reports a simple-structured vibration sensor, which has been developed using a commercialized conductive ball and silicon bulk-micromachining technology. The sensor consists of a conductive ball placed in $600{\mu}m$-deep micromachined silicon groove, in which Au thin film has been patterned using a shadow mask technique. Prior to the formation of the Au thin film, the sharp convex corner was rounded for smooth meatl deposition on the non-planar surface at the edge of the groove. The measurement results of the fabricated vibration sensor demonstrate a stable response characteristic to low-frequency vibration range ($1{\sim}30{\;}Hz$).

Sol-Gel 공정을 이용한 ZnO 쇼트키 다이오드의 제작 및 특성평가 (Fabrication and Characterization of ZnO Schottky Diode Using Sol-Gel Process)

  • 이득희;김경원;박기호;김상식;이상렬
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2010년도 하계학술대회 논문집
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    • pp.390-390
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    • 2010
  • We fabricate Schottky diodes with the contact between a sol-gel derived ZnO layer and Au that guarantees the expected Schottky contact due to the high work function. The formed single metal Schottky barrier shows characteristics comparable to the barrier formed by alloys. Au is deposited by thermal evaporation on a ZnO thin film that is optimally formed under sol-gel process conditions of a 1-mol zinc acetate concentration and a 3000-rpm coating speed. Possible defects. which can provide deleterious current paths. are minimized by patterning the deposited Au. The I-V curve verifies the formation of a Schottky contact. Measurements showed that the Schottky barrier height and leakage current at -5 V were 0.6 eV and $1{\times}10^{-12}A$. respectively.

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SC1 세척공정을 이용한 고품질 Poly(3,4-ethylenedioxythiophene) 전극 패턴 어레이의 개발 (Development of High-Quality Poly(3,4-ethylenedioxythiophene) Electrode Pattern Array Using SC1 Cleaning Process)

  • 최상일;김원대;김성수
    • 통합자연과학논문집
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    • 제4권4호
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    • pp.311-314
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    • 2011
  • Application of self-assembled monolayers (SAMs) to the fabrication of organic thin film transistor has been recently reported very often since it can help to provide ohmic contact between films as well as to form simple and effective electrode pattern. Accordingly, quality of these ultra-thin films is becoming more imperative. In this study, in order to manufacture a high quality SAM pattern, a hydrophobic alkylsilane monolayer and a hydrophilic aminosilane monolayer were selectively coated on $SiO_2$ surface through the consecutive procedures of a micro-contact printing (${\mu}CP$) and dip-coating methods under extremely dry condition. On a SAM pattern cleaned with SC1 solution immediately after ${\mu}CP$, poly(3,4-ethylenedioxythiophene) (PEDOT) source and drain electrode array were very selectively and nicely vapour phase polymerized. On the other side, on a SC1-untreated SAM pattern, PEDOT array was very poorly polymerized. It strongly suggests that the SC1 cleaning process effectively removes unwanted contaminants on SAM pattern, thereby resulting in very selective growth of PEDOT electrode pattern.

UV-NIL(Ultraviolet-Nano-Imprinting-Lithography) 방법을 이용한 나노 패터닝기술 (Nano-patterning technology using an UV-NIL method)

  • 심영석;정준호;손현기;신영재;이응숙;최성욱;김재호
    • 한국진공학회지
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    • 제13권1호
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    • pp.39-45
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    • 2004
  • UV-나노임프린팅 (Ultraviolet-Nanoimprinting Lithography:UV-NIL) 공정 기술은 수십 나노에서 수 나노미터 크기의 구조물을 적은 비용으로 대량생산 할 수 있다는 장점을 가지고 있는 기술로 최근 전세계적으로 연구가 활발히 진행되고 있다. 본 연구에서는 반도체 공정 중 마스크 제작 공정을 이용하여 나노패턴을 가진 5${\times}$5${\times}$0.09 인치 크기의 수정스탬프(quartz stamp)를 제작하였고, 임프린팅 (imprinting)시에 레지스트(resist)와 스탬프(stamp) 사이에서 발생하는 점착현상(adhesion)을 방지하고자 그 표면에 Fluoroalkanesilane(FAS) 표면처리를 하였다. 웨이퍼의 평탄도를 개선하고 친수(hydrophilic) 상태의 표면을 만들기 위해 그 표면에 평탄화층을 스핀코팅하였고, 1 nl의 분해능을 가진 디스펜서(dispenser)를 이용하여 레지스트 액적을 도포하였다. 스템프 상의 패턴과 레지스트에 임프린트된 패턴은 SEM, AFM 등을 이용하여 측정하였으며, EVG620-NIL 장비를 이용한 임프린팅 실험에서 370 nm - 1 um 크기의 다양한 패턴을 가진 스탬프의 패턴들이 정확하게 레지스트에 전사됨을 확인하였다.

LCD 공정용 C3F6 가스를 이용한 Si3N4 박막 식각공정 및 배출가스에 관한 연구 (A Study on Etching of Si3N4 Thin Film and the Exhausted Gas Using C3F6 Gas for LCD Process)

  • 전성찬;공대영;표대승;최호윤;조찬섭;김봉환;이종현
    • 한국진공학회지
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    • 제21권4호
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    • pp.199-204
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    • 2012
  • $SF_6$ 가스는 반도체 및 디스플레이 제조공정 중 건식식각 공정에서 널리 사용되는 가스이다. 하지만 $SF_6$ 가스는 대표적인 온실가스로서 지구 온난화에 큰 영향을 끼치기 때문에 반도체 및 디스플레이 공정에서 $SF_6$ 가스를 대체할 수 있는 가스의 연구가 필요한 상황이다. 그 후보군으로 떠오르고 있는 가스 중의 하나가 바로 $C_3F_6$ 가스이다. 이 가스를 이용하여 $Si_3N_4$ 박막을 건식식각 방법인 Reactive Ion Etching 공정을 수행하여 식각 특성에 관하여 연구하였으며, 흡착제 Zeolite 5A를 이용하여 식각공정 중 배출되는 가스 성분을 감소시켰다. Plasma Enhanced Chemical Vapor Deposition 장비를 이용하여 500 nm 두께의$Si_3N_4$ 박막을 증착하였으며, 노광 공정을 통해 패터닝을 한 후 Reactive Ion Etching 공정을 수행하였다. 그리고 Scanning Electron Microscope 장비를 이용하여 $Si_3N_4$ 박막의 식각된 단면과 식각율을 확인하였다. 또한 공정 후 흡착제 Zeolite 5A를 통과하기 전과 후에 배출되는 가스를 포집하여 Gas Chromatograph-Mass Spectrophotometry 장비를 이용하여 가스 성분을 측정 및 비교하였다.

Development of Process and Equipment for Roll-to-Roll convergence printing technology

  • 김동수;배성우;김충환
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2010년도 춘계학술발표대회
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    • pp.19.1-19.1
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    • 2010
  • The process of manufacturing printed electronics using printing technology is attracting attention because its process cost is lower than that of the conventional semiconductor process. This technology, which offers both a lower cost and higher productivity, can be applied in the production of organic TFT (thin film transistor), solar cell, RFID(radio frequency identification) tag, printed battery, E-paper, touch screen panel, black matrix for LCD(liquid crystal display), flexible display, and so forth. In general, in order to implement printed electronics, narrow width and gap printing, registration of multi-layer printing by several printing units, and printing accuracy of under $20\;{\mu}m$ are all required. These electronic products require high precision to the degree of tens of microns - in a large area with flexible material, and mass productivity at low cost. As such, the roll-to-roll printing process is attracting attention as a mass production system for these printed electronic devices. For the commercialization of this process, two basic electronic ink technologies, such as conductive ink and polymers, and printing equipment have to be developed. Therefore, this paper addressed basis design and test to develop fine patterning equipment employing the roll-to-roll printing equipment and electronic ink.

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평판형 광-바이오센서용 2차원 광자결정 제작을 위한 Dip-Pen Nanolithography 공정 연구 (A Study on Dip-Pen Nanolithography Process to fabricate Two-dimensional Photonic Crystal for Planar-type Optical Biosensor)

  • 김준형;이종일;이현용
    • 한국전기전자재료학회논문지
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    • 제19권3호
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    • pp.267-272
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    • 2006
  • Optical waveguide based on symmetric and asymmetric Mach-Zehnder interferometer(MZI) type was designed, fabricated and measured the optical characteristics for the application of biosensor. The wavelength of the input optical signal for the device was 1550 nm. And the difference of refractive index was $0.45\;{\Delta}\%$ between core and cladding of the device. The TM(Transverse Magnetic) mode optical properties of the biosensor were analyzed with the refractive index variation of gold thin film deposited for overclad. Nowadays, nano-photonic crystal structures have been paied much attention for its high optical sensitivity. There is a technique to realize the structure, which is called Dip-Pen Nanolithography(DPN) process. The process requires a nano-scale process patterning resolution and high reliability. In this paper, two dimensional nano-photonic crystal array on the surface was proposed for improving the sensitivity of optical biosensor. And the Dip-Pen Nanolithogrphy process was investigated to realize it.

레이저 직접묘화법에 의한 AlN 기판상의 전도성 패턴 제작에 관한 연구 (A Study on Fabrication of Conductor Patterns on AlN Ceramic Surface by Laser Direct Writing)

  • 이제훈;서정;한유희
    • 한국레이저가공학회지
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    • 제3권2호
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    • pp.25-33
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    • 2000
  • One of perspective direction of microfabrication is direct laser writing technology that allows to create metal, semiconductive and dielectric micropatterns on substrate surface. In this work, a two step method, the combination of seed forming process, in which metallic Al seed was selectively generated on AlN ceramic substrate by direct writing technique using a pulsed Nd : YAG laser and subsequent electroless Ni plating on the activated Al seed, was presented. The effects of laser parameters such as pulse energy, scanning speed and pulse frequency on shape of Alseed and conductor line after electroless Ni plating were investigated. The nature of the laser activated surface is analyzed from XPS data. The line width of this metallic Al and Ni is analyzed using SEM. As a results, Al seed line with 24㎛ width and 100㎛ isolated line space is obtained. Finally, laser direct writing can be applied in the field between thin and thick film technique in electronic industry.

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펨토초 레이저 펄스를 이용한 환원된 그래핀의 최소 선폭 패턴 구현에 관한 연구 (The study of optimal reduced-graphene oxide line patterning by using femtosecond laser pulse)

  • 정태인;김승철
    • 한국융합학회논문지
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    • 제11권7호
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    • pp.157-162
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    • 2020
  • 최근 레이저를 이용하여 환원된 친환경 그래핀 패턴 기술(Laser Induced Graphene, LIG)은 간단하고 효율적으로 원하는 형태로 다양한 기판 위에 패터닝하는 것이 가능하여 신축 유연 전자 소자, 박막 형태의 에너지 저장 소자 등과 같이 새로운 친환경 전자 소자 제작에 많이 활용되고 있다. 이러한 그래핀 패턴 구조를 이용한 전자 소자의 성능과 효용성을 높이기 위해서는 그래핀 고유의 2차원 특성을 유지하면서 가능한 최소한의 선폭을 구현할 수 있는 최적화된 레이저 패터닝 조건에 대한 연구가 필수적이다. 본 논문에서는 최근 레이저 그래핀 패턴 연구에서 많이 사용되는 Ti:sapphire 펨토초 레이저를 이용해서 그래핀 광-열 산화반응을 분석하여 최적화된 그래핀의 최소선폭을 구현하였다. 레이저 에너지의 확산 효과를 최소화하기 위하여 레이저 광강도와 레이저 스캔 속도를 조절하여 최적의 그래핀 특성을 나타내는 패턴을 연구하였으며 18 ㎛의 집속된 빔을 이용하여 최소 30 ㎛의 이차원 그래핀 선폭을 구현하였다.

유연한 기판상의 유기 트랜지스터의 절연 표면층 상태 변화에 의한 전기적 특성 향상 (Changes of dielectric surface state In organic TFTs on flexible substrate)

  • 김종무;이주원;김영민;박정수;김재경;장진;오명환;주병권
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2004년도 춘계학술대회 논문집 디스플레이 광소자분야
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    • pp.86-89
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    • 2004
  • Organic thin film transistors (OTFTs) are fabricated on the plastic substrate through 4-level mask process without photolithographic patterning to yield the simple fabrication process. And we herewith report for the effect of dielectric surface modification on the electrical characteristics of OTFTs. The KIST-JM-1 as an organic molecule for the surface modification is deposited onto the surface of zirconium oxide $(ZrO_2)$ gate dielectric layer. In this work, we have examined the dependence of electrical performance on the interface surface state of gate dielectric/pentacene, which may be modified by chemical properties in the gate dielectric surface.

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