• Title/Summary/Keyword: Thin film silicon

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LDD 구조를 이용한 다결정 실리콘 박막 트랜지스터의 신뢰성 향상 (Polysilicon Thin Film Transistor for Improving Reliability using by U]D Structure)

  • 정은식;장원수;배지철;이용재
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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    • pp.185-188
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    • 2002
  • In this paper, Amorphous silicon on glass substrate was recrytallized to poly-crystalline silicon by solid phase crystallization(SPC) technology The active region of thin film transistor(TFT) was fabricated by amorphous silicon. The output and transfer characteristics of thin film transistor with lightly doped drain(LDD) structure was measured and analyzed. As a results, analyzed TFT's reliability with LDD's length by various kinds argument such as sub-threshold swing coefficient, mobility and threshold voltages were evaluated. Stress effects in TFT were able to improve to the characteristics of turn-on current and hot carrier effects by LDD's length variations

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누설전류 감소를 위한 Bird's Beak 공정을 이용한 다결정 실리콘 박막 트랜지스터의 구조 연구 (A Researching about Reducing Leakage Current of Polycrystalline Silicon Thin Film Transistors with Bird's Beak Structure)

  • 이진민
    • 한국전기전자재료학회논문지
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    • 제24권2호
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    • pp.112-115
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    • 2011
  • To stabilize the electric characteristic of Silicon Thin Film Transistor, reducing the current leakage is most important issue. To reduce the current leakage, many ideas were suggested. But the increase of mask layer also increased the cost. On this research Bird's Beak process was use to present element. Using Silvaco simulator, it was proven that it was able to reduce current leakage without mask layer. As a result, it was possible to suggest the structure that can reduce the current leakage to 1.39nA without having mask layer increase. Also, I was able to lead the result that electric characteristic (on/off current ratio) was improved compare from conventional structure.

SiO$_2$ 박막을 이용한 SOI 직접접합공정 및 특성 (Processing and Characterization of a Direct Bonded SOI using SiO$_2$ Thin Film)

  • 신동운;최두진;김긍호
    • 한국세라믹학회지
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    • 제35권6호
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    • pp.535-542
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    • 1998
  • SOI(silicon oninsulator) was fabricated through the direct bonding of a hydrophilized single crystal Si wafer and a thermally oxidized SiO2 thin film to investigate the stacking faults in silicon at the Si/SiO2 in-terface. At first the oxidation kinetics of SiO2 thin film and the stacking fault distribution at the oxidation interface were investigated. The stacking faults could be divided into two groups by their size and the small-er ones were incorporated into the larger ones as the oxidation time and temperature increased. The den-sity of the smaller ones based critically lower eventually. The SOI wafers directly bonded at the room temperature were annealed at 120$0^{\circ}C$ for 1 hour. The stacking faults at the bonding and oxidation interface were examined and there were anomalies in the distributions of the stacking faults of the bonded region to arrange in ordered ring-like fashion.

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두 단계 열처리에 의해 제작된 다결정 실리콘 박막트랜지스터의 전기적 특성의 분석 (Analysis of electrical properties of two-step annealed polycrystalline silicon thin film transistors)

  • 최권영;한민구;김용상
    • 대한전기학회논문지
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    • 제45권4호
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    • pp.568-573
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    • 1996
  • The amorphous silicon films deposited by low pressure chemical vapor deposition are crystallized by the various annealing techniques including low-temperature furnace annealing and two-step annealing. Two-step annealing is the combination of furnace annealing at 600 [.deg. C] for 24 h and the sequential furnace annealing at 950 [.deg. C] 1h or the excimer laser annealing. It s found that two-step annealings reduce the in-grain defects significantly without changing the grain boundary structure. The performance of the poly-Si thin film transistors (TFTs) produced by employing the tow-step annealing has been improved significantly compared with those of one-step annealing. (author). 13 refs., 6 figs., 1 tab.

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옥외 설치된 비정질 실리콘 박막태양전지모듈의 전기적 출력 특성 분석 (Analysis of Electrical Characteristics of Amorphous Silicon Thin Film Photovoltaic Module Exposed Outdoor)

  • 김경수;강기환;유권종
    • 한국태양에너지학회 논문집
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    • 제28권4호
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    • pp.62-67
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    • 2008
  • In this study, we analyze the electrical characteristics of amorphous silicon thin film photovoltaic module which are installed about 5 years ago. Four modules from PV system are extracted and measured the maximum power change ratio using solar simulator(Class A). Also, infrared camera is used to get thermal distribution characteristics of system. The external appearance change is compared with initial module by naked eye examination. Through this experiment, 31% maximum output power drop is observed. The detail description is specified as the following paper.

Ultraviolet Photodetection Properties of ZnO/Si Heterojunction Diodes Fabricated by ALD Technique Without Using a Buffer Layer

  • Hazra, Purnima;Singh, S.K.;Jit, S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권1호
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    • pp.117-123
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    • 2014
  • The fabrication and characterization of a Si/ZnO thin film heterojunction ultraviolet photodiode has been presented in this paper. ZnO thin film of ~100 nm thick was deposited on <100> Silicon (Si) wafer by atomic layer deposition (ALD) technique. The Photoluminescence spectroscopy confirms that as-deposited ZnO thin film has excellent visible-blind UV response with almost no defects in the visible region. The room temperature current-voltage characteristics of the n-ZnO thin film/p-Si photodiodes are measured under an UV illumination of $650{\mu}W$ at 365 nm in the applied voltage range of ${\pm}2V$. The current-voltage characteristics demonstrate an excellent UV photoresponse of the device in its reverse bias operation with a contrast ratio of ~ 1115 and responsivity of ~0.075 A/W at 2 V reverse bias voltage.

Present Status and Prospects of Thin Film Silicon Solar Cells

  • Iftiquar, Sk Md;Park, Jinjoo;Shin, Jonghoon;Jung, Junhee;Bong, Sungjae;Dao, Vinh Ai;Yi, Junsin
    • Current Photovoltaic Research
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    • 제2권2호
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    • pp.41-47
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    • 2014
  • Extensive investigation on silicon based thin film reveals a wide range of film characteristics, from low optical gap to high optical gap, from amorphous to micro-crystalline silicon etc. Fabrication of single junction, tandem and triple junction solar cell with suitable materials, indicate that fabrication of solar cell of a relatively moderate efficiency is possible with a better light induced stability. Due to these investigations, various competing materials like wide band gap silicon carbide and silicon oxide, low band gap micro-crystalline silicon and silicon germanium etc were also prepared and applied to the solar cells. Such a multi-junction solar cell can be a technologically promising photo-voltaic device, as the external quantum efficiency of such a cell covers a wider spectral range.

램프 스캐닝 열처리에 의한 다결정 실리콘 박막의 형성 및 TFT 제작에 관한 연구 (A Study on the Formation of Polycrystalline Silicon Film by Lamp-Scanning Annealing and Fabrication of Thin Film Transistors)

  • 김태경;김기범;이병일;주승기
    • 전자공학회논문지D
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    • 제36D권1호
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    • pp.57-62
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    • 1999
  • 유리기판 위에 다결정 실리콘 박막 트랜지스터(Thin Film Transistor, TFT)를 형성하기 위해서 램프 Scanning 열처리 장치를 개발하였다. 선형 램프를 Scanning 함으로써 대면적 유리기판에의 적용 가능성을 높였으며 TFT의 채널 부분은 금속 유도 측면 결정화 방법에 의해 결정화 시켰다. 할로겐 램프에 의한 빛은 투명 유리기판은 가열시키지 않고 ,island 행태의 실리콘 박막만을 가열시킬 수 있었다. 실리콘 산화막으로 이루어진 Capping layer를 적용하였고 이때의 성장 속도는 Capping layer가 없는 경우보다 35배 정도로 빠른 MILC 성장 속도를 나타내었다. 할로겐 램프를 약 1.4mm/sec의 속도록 Scanning한 경우 유리기판의 손상 없이 18-27${\mu}m/scan$ 정도의 결정화를 나타내었다. 이와 같이 제작된 다결정 실리콘 박막으로 제작된 TFT는 전자이동도 130$cm^2/V{\cdot}sec$의 우수한 특성을 나타내었다.

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실리콘 이종접합 태양전지의 Zn 확산방지층에 의한 TCO/a-Si:H 층간의 계면특성 변화 (Changes in Interface Properties of TCO/a-Si:H Layer by Zn Buffer Layer in Silicon Heterojunction Solar Cells)

  • 탁성주;손창식;김동환
    • 한국재료학회지
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    • 제21권6호
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    • pp.341-346
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    • 2011
  • In this study, we inserted a Zn buffer layer into a AZO/p-type a-si:H layer interface in order to lower the contact resistance of the interface. For the Zn layer, the deposition was conducted at 5 nm, 7 nm and 10 nm using the rf-magnetron sputtering method. The results were compared to that of the AZO film to discuss the possibility of the Zn layer being used as a transparent conductive oxide thin film for application in the silicon heterojunction solar cell. We used the rf-magnetron sputtering method to fabricate Al 2 wt.% of Al-doped ZnO (AZO) film as a transparent conductive oxide (TCO). We analyzed the electro-optical properties of the ZnO as well as the interface properties of the AZO/p-type a-Si:H layer. After inserting a buffer layer into the AZO/p-type a-Si:H layers to enhance the interface properties, we measured the contact resistance of the layers using a CTLM (circular transmission line model) pattern, the depth profile of the layers using AES (auger electron spectroscopy), and the changes in the properties of the AZO thin film through heat treatment. We investigated the effects of the interface properties of the AZO/p-type a-Si:H layer on the characteristics of silicon heterojunction solar cells and the way to improve the interface properties. When depositing AZO thin film on a-Si layer, oxygen atoms are diffused from the AZO thin film towards the a-Si layer. Thus, the characteristics of the solar cells deteriorate due to the created oxide film. While a diffusion of Zn occurs toward the a-Si in the case of AZO used as TCO, the diffusion of In occurs toward a-Si in the case of ITO used as TCO.

고품질 실리콘 박막을 이용한 저가 고효율 실리콘 박막 및 a-Si:H/c-Si 이종접합 태양전지 개발 (Development of low cost and high efficiency silicon thin-film and a-Si:H/c-Si hetero-junction solar cells using low temperature silicon thin-films)

  • 이정철;임충현;안세진;윤재호;김석기;김동섭;양수미;강희복;이보영;이준신;송진수;윤경훈
    • 한국신재생에너지학회:학술대회논문집
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    • 한국신재생에너지학회 2005년도 춘계학술대회
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    • pp.113-116
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    • 2005
  • In this paper, silicon thin-film solar cells(Si- TFSC) and a-Si/c-Si heterojunction solar cells(HJ-cell) are investigated. The Si-TFSC was prepared on glass substrate by depositing $1-3{\mu}m$ thin-film silicons by glow discharge method. The $a-Si:H/{\mu}c-Si:H$ tandem solar cells on textured ZnO:A1 TCO (transparent conducting oxide) showed improved Jsc in top and bottom cells than that on $SnO_2:F$ TCO. This enhancement of jsc resulted from improved light trapping effect by front textured ZnO:A1. The a-Si/c-Si HJ-cells with simple structure without high efficiency features are suffering from low Voc and Jsc. The improvement of front nip and back interface properties by adopting high quality silicon-films at low temperature should be done both for increasing device performances and production cost.

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